a9f2cd80ee
Add ipq8064-v2.0 dtsi variant that differ from original ipq8064 SoC for some additional pcie, sata and usb configuration values, additional reserved memory and serial output. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220718161826.4943-1-ansuelsmth@gmail.com
70 lines
1.0 KiB
Plaintext
70 lines
1.0 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0
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#include "qcom-ipq8064.dtsi"
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/ {
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model = "Qualcomm Technologies, Inc. IPQ8064-v2.0";
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aliases {
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serial0 = &gsbi4_serial;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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reserved-memory {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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rsvd@41200000 {
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reg = <0x41200000 0x300000>;
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no-map;
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};
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};
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};
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&gsbi4 {
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qcom,mode = <GSBI_PROT_I2C_UART>;
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status = "okay";
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serial@16340000 {
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status = "okay";
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};
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/*
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* The i2c device on gsbi4 should not be enabled.
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* On ipq806x designs gsbi4 i2c is meant for exclusive
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* RPM usage. Turning this on in kernel manifests as
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* i2c failure for the RPM.
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*/
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};
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&pcie0 {
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compatible = "qcom,pcie-ipq8064-v2";
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};
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&pcie1 {
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compatible = "qcom,pcie-ipq8064-v2";
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};
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&pcie2 {
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compatible = "qcom,pcie-ipq8064-v2";
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};
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&sata {
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ports-implemented = <0x1>;
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};
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&ss_phy_0 {
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qcom,rx-eq = <2>;
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qcom,tx-deamp_3_5db = <32>;
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qcom,mpll = <5>;
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};
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&ss_phy_1 {
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qcom,rx-eq = <2>;
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qcom,tx-deamp_3_5db = <32>;
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qcom,mpll = <5>;
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};
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