e7ae65ced7
The gpiolib supports parsing DT properties of the form <name>-gpio but it
was only added for compatibility with older DT bindings that got it wrong
and should not be used in newer bindings.
The commit that added support for this was:
dd34c37aa3e8 ("gpio: of: Allow -gpio suffix for property names")
but didn't update the documentation to explain this so it's been a source
of confusion. So let's make this clear in the GPIO DT binding doc.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Rob Herring <robh@kernel.org>
245 lines
9.0 KiB
Plaintext
245 lines
9.0 KiB
Plaintext
Specifying GPIO information for devices
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============================================
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1) gpios property
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-----------------
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Nodes that makes use of GPIOs should specify them using one or more
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properties, each containing a 'gpio-list':
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gpio-list ::= <single-gpio> [gpio-list]
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single-gpio ::= <gpio-phandle> <gpio-specifier>
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gpio-phandle : phandle to gpio controller node
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gpio-specifier : Array of #gpio-cells specifying specific gpio
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(controller specific)
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GPIO properties should be named "[<name>-]gpios", with <name> being the purpose
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of this GPIO for the device. While a non-existent <name> is considered valid
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for compatibility reasons (resolving to the "gpios" property), it is not allowed
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for new bindings. Also, GPIO properties named "[<name>-]gpio" are valid and old
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bindings use it, but are only supported for compatibility reasons and should not
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be used for newer bindings since it has been deprecated.
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GPIO properties can contain one or more GPIO phandles, but only in exceptional
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cases should they contain more than one. If your device uses several GPIOs with
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distinct functions, reference each of them under its own property, giving it a
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meaningful name. The only case where an array of GPIOs is accepted is when
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several GPIOs serve the same function (e.g. a parallel data line).
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The exact purpose of each gpios property must be documented in the device tree
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binding of the device.
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The following example could be used to describe GPIO pins used as device enable
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and bit-banged data signals:
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gpio1: gpio1 {
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gpio-controller
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#gpio-cells = <2>;
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};
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gpio2: gpio2 {
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gpio-controller
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#gpio-cells = <1>;
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};
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[...]
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enable-gpios = <&gpio2 2>;
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data-gpios = <&gpio1 12 0>,
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<&gpio1 13 0>,
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<&gpio1 14 0>,
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<&gpio1 15 0>;
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Note that gpio-specifier length is controller dependent. In the
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above example, &gpio1 uses 2 cells to specify a gpio, while &gpio2
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only uses one.
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gpio-specifier may encode: bank, pin position inside the bank,
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whether pin is open-drain and whether pin is logically inverted.
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Exact meaning of each specifier cell is controller specific, and must
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be documented in the device tree binding for the device. Use the macros
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defined in include/dt-bindings/gpio/gpio.h whenever possible:
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Example of a node using GPIOs:
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node {
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enable-gpios = <&qe_pio_e 18 GPIO_ACTIVE_HIGH>;
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};
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GPIO_ACTIVE_HIGH is 0, so in this example gpio-specifier is "18 0" and encodes
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GPIO pin number, and GPIO flags as accepted by the "qe_pio_e" gpio-controller.
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1.1) GPIO specifier best practices
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----------------------------------
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A gpio-specifier should contain a flag indicating the GPIO polarity; active-
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high or active-low. If it does, the following best practices should be
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followed:
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The gpio-specifier's polarity flag should represent the physical level at the
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GPIO controller that achieves (or represents, for inputs) a logically asserted
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value at the device. The exact definition of logically asserted should be
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defined by the binding for the device. If the board inverts the signal between
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the GPIO controller and the device, then the gpio-specifier will represent the
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opposite physical level than the signal at the device's pin.
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When the device's signal polarity is configurable, the binding for the
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device must either:
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a) Define a single static polarity for the signal, with the expectation that
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any software using that binding would statically program the device to use
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that signal polarity.
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The static choice of polarity may be either:
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a1) (Preferred) Dictated by a binding-specific DT property.
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or:
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a2) Defined statically by the DT binding itself.
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In particular, the polarity cannot be derived from the gpio-specifier, since
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that would prevent the DT from separately representing the two orthogonal
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concepts of configurable signal polarity in the device, and possible board-
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level signal inversion.
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or:
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b) Pick a single option for device signal polarity, and document this choice
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in the binding. The gpio-specifier should represent the polarity of the signal
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(at the GPIO controller) assuming that the device is configured for this
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particular signal polarity choice. If software chooses to program the device
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to generate or receive a signal of the opposite polarity, software will be
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responsible for correctly interpreting (inverting) the GPIO signal at the GPIO
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controller.
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2) gpio-controller nodes
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------------------------
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Every GPIO controller node must contain both an empty "gpio-controller"
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property, and a #gpio-cells integer property, which indicates the number of
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cells in a gpio-specifier.
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The GPIO chip may contain GPIO hog definitions. GPIO hogging is a mechanism
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providing automatic GPIO request and configuration as part of the
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gpio-controller's driver probe function.
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Each GPIO hog definition is represented as a child node of the GPIO controller.
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Required properties:
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- gpio-hog: A property specifying that this child node represent a GPIO hog.
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- gpios: Store the GPIO information (id, flags, ...). Shall contain the
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number of cells specified in its parent node (GPIO controller
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node).
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Only one of the following properties scanned in the order shown below.
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This means that when multiple properties are present they will be searched
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in the order presented below and the first match is taken as the intended
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configuration.
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- input: A property specifying to set the GPIO direction as input.
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- output-low A property specifying to set the GPIO direction as output with
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the value low.
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- output-high A property specifying to set the GPIO direction as output with
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the value high.
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Optional properties:
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- line-name: The GPIO label name. If not present the node name is used.
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Example of two SOC GPIO banks defined as gpio-controller nodes:
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qe_pio_a: gpio-controller@1400 {
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compatible = "fsl,qe-pario-bank-a", "fsl,qe-pario-bank";
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reg = <0x1400 0x18>;
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gpio-controller;
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#gpio-cells = <2>;
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line_b {
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gpio-hog;
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gpios = <6 0>;
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output-low;
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line-name = "foo-bar-gpio";
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};
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};
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qe_pio_e: gpio-controller@1460 {
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compatible = "fsl,qe-pario-bank-e", "fsl,qe-pario-bank";
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reg = <0x1460 0x18>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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2.1) gpio- and pin-controller interaction
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-----------------------------------------
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Some or all of the GPIOs provided by a GPIO controller may be routed to pins
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on the package via a pin controller. This allows muxing those pins between
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GPIO and other functions.
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It is useful to represent which GPIOs correspond to which pins on which pin
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controllers. The gpio-ranges property described below represents this, and
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contains information structures as follows:
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gpio-range-list ::= <single-gpio-range> [gpio-range-list]
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single-gpio-range ::= <numeric-gpio-range> | <named-gpio-range>
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numeric-gpio-range ::=
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<pinctrl-phandle> <gpio-base> <pinctrl-base> <count>
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named-gpio-range ::= <pinctrl-phandle> <gpio-base> '<0 0>'
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pinctrl-phandle : phandle to pin controller node
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gpio-base : Base GPIO ID in the GPIO controller
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pinctrl-base : Base pinctrl pin ID in the pin controller
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count : The number of GPIOs/pins in this range
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The "pin controller node" mentioned above must conform to the bindings
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described in ../pinctrl/pinctrl-bindings.txt.
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In case named gpio ranges are used (ranges with both <pinctrl-base> and
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<count> set to 0), the property gpio-ranges-group-names contains one string
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for every single-gpio-range in gpio-ranges:
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gpiorange-names-list ::= <gpiorange-name> [gpiorange-names-list]
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gpiorange-name : Name of the pingroup associated to the GPIO range in
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the respective pin controller.
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Elements of gpiorange-names-list corresponding to numeric ranges contain
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the empty string. Elements of gpiorange-names-list corresponding to named
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ranges contain the name of a pin group defined in the respective pin
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controller. The number of pins/GPIOs in the range is the number of pins in
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that pin group.
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Previous versions of this binding required all pin controller nodes that
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were referenced by any gpio-ranges property to contain a property named
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#gpio-range-cells with value <3>. This requirement is now deprecated.
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However, that property may still exist in older device trees for
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compatibility reasons, and would still be required even in new device
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trees that need to be compatible with older software.
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Example 1:
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qe_pio_e: gpio-controller@1460 {
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#gpio-cells = <2>;
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compatible = "fsl,qe-pario-bank-e", "fsl,qe-pario-bank";
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reg = <0x1460 0x18>;
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gpio-controller;
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gpio-ranges = <&pinctrl1 0 20 10>, <&pinctrl2 10 50 20>;
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};
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Here, a single GPIO controller has GPIOs 0..9 routed to pin controller
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pinctrl1's pins 20..29, and GPIOs 10..19 routed to pin controller pinctrl2's
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pins 50..59.
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Example 2:
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gpio_pio_i: gpio-controller@14B0 {
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#gpio-cells = <2>;
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compatible = "fsl,qe-pario-bank-e", "fsl,qe-pario-bank";
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reg = <0x1480 0x18>;
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gpio-controller;
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gpio-ranges = <&pinctrl1 0 20 10>,
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<&pinctrl2 10 0 0>,
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<&pinctrl1 15 0 10>,
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<&pinctrl2 25 0 0>;
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gpio-ranges-group-names = "",
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"foo",
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"",
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"bar";
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};
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Here, three GPIO ranges are defined wrt. two pin controllers. pinctrl1 GPIO
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ranges are defined using pin numbers whereas the GPIO ranges wrt. pinctrl2
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are named "foo" and "bar".
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