917df025e1
This helper should help identify cases where devices fall off the bus and don't resync. BugLink: https://github.com/thesofproject/linux/issues/3638 Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Reviewed-by: Rander Wang <rander.wang@intel.com> Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com> Acked-By: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20220714011043.46059-5-yung-chuan.liao@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
830 lines
21 KiB
C
830 lines
21 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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//
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// rt5682-sdw.c -- RT5682 ALSA SoC audio component driver
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//
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// Copyright 2019 Realtek Semiconductor Corp.
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// Author: Oder Chiou <oder_chiou@realtek.com>
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//
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/pm.h>
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#include <linux/acpi.h>
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#include <linux/gpio.h>
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#include <linux/of_gpio.h>
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#include <linux/pm_runtime.h>
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#include <linux/regulator/consumer.h>
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#include <linux/mutex.h>
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#include <linux/soundwire/sdw.h>
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#include <linux/soundwire/sdw_type.h>
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#include <linux/soundwire/sdw_registers.h>
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#include <sound/core.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/jack.h>
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#include <sound/soc.h>
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#include <sound/soc-dapm.h>
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#include <sound/initval.h>
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#include <sound/tlv.h>
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#include "rt5682.h"
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#define RT5682_SDW_ADDR_L 0x3000
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#define RT5682_SDW_ADDR_H 0x3001
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#define RT5682_SDW_DATA_L 0x3004
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#define RT5682_SDW_DATA_H 0x3005
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#define RT5682_SDW_CMD 0x3008
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static int rt5682_sdw_read(void *context, unsigned int reg, unsigned int *val)
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{
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struct device *dev = context;
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struct rt5682_priv *rt5682 = dev_get_drvdata(dev);
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unsigned int data_l, data_h;
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regmap_write(rt5682->sdw_regmap, RT5682_SDW_CMD, 0);
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regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_H, (reg >> 8) & 0xff);
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regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_L, (reg & 0xff));
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regmap_read(rt5682->sdw_regmap, RT5682_SDW_DATA_H, &data_h);
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regmap_read(rt5682->sdw_regmap, RT5682_SDW_DATA_L, &data_l);
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*val = (data_h << 8) | data_l;
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dev_vdbg(dev, "[%s] %04x => %04x\n", __func__, reg, *val);
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return 0;
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}
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static int rt5682_sdw_write(void *context, unsigned int reg, unsigned int val)
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{
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struct device *dev = context;
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struct rt5682_priv *rt5682 = dev_get_drvdata(dev);
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regmap_write(rt5682->sdw_regmap, RT5682_SDW_CMD, 1);
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regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_H, (reg >> 8) & 0xff);
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regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_L, (reg & 0xff));
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regmap_write(rt5682->sdw_regmap, RT5682_SDW_DATA_H, (val >> 8) & 0xff);
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regmap_write(rt5682->sdw_regmap, RT5682_SDW_DATA_L, (val & 0xff));
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dev_vdbg(dev, "[%s] %04x <= %04x\n", __func__, reg, val);
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return 0;
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}
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static const struct regmap_config rt5682_sdw_indirect_regmap = {
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.reg_bits = 16,
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.val_bits = 16,
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.max_register = RT5682_I2C_MODE,
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.volatile_reg = rt5682_volatile_register,
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.readable_reg = rt5682_readable_register,
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.cache_type = REGCACHE_RBTREE,
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.reg_defaults = rt5682_reg,
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.num_reg_defaults = RT5682_REG_NUM,
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.use_single_read = true,
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.use_single_write = true,
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.reg_read = rt5682_sdw_read,
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.reg_write = rt5682_sdw_write,
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};
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struct sdw_stream_data {
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struct sdw_stream_runtime *sdw_stream;
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};
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static int rt5682_set_sdw_stream(struct snd_soc_dai *dai, void *sdw_stream,
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int direction)
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{
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struct sdw_stream_data *stream;
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if (!sdw_stream)
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return 0;
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stream = kzalloc(sizeof(*stream), GFP_KERNEL);
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if (!stream)
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return -ENOMEM;
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stream->sdw_stream = sdw_stream;
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/* Use tx_mask or rx_mask to configure stream tag and set dma_data */
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if (direction == SNDRV_PCM_STREAM_PLAYBACK)
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dai->playback_dma_data = stream;
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else
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dai->capture_dma_data = stream;
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return 0;
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}
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static void rt5682_sdw_shutdown(struct snd_pcm_substream *substream,
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struct snd_soc_dai *dai)
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{
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struct sdw_stream_data *stream;
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stream = snd_soc_dai_get_dma_data(dai, substream);
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snd_soc_dai_set_dma_data(dai, substream, NULL);
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kfree(stream);
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}
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static int rt5682_sdw_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct snd_soc_dai *dai)
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{
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struct snd_soc_component *component = dai->component;
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struct rt5682_priv *rt5682 = snd_soc_component_get_drvdata(component);
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struct sdw_stream_config stream_config;
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struct sdw_port_config port_config;
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enum sdw_data_direction direction;
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struct sdw_stream_data *stream;
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int retval, port, num_channels;
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unsigned int val_p = 0, val_c = 0, osr_p = 0, osr_c = 0;
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dev_dbg(dai->dev, "%s %s", __func__, dai->name);
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stream = snd_soc_dai_get_dma_data(dai, substream);
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if (!stream)
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return -ENOMEM;
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if (!rt5682->slave)
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return -EINVAL;
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/* SoundWire specific configuration */
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
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direction = SDW_DATA_DIR_RX;
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port = 1;
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} else {
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direction = SDW_DATA_DIR_TX;
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port = 2;
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}
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stream_config.frame_rate = params_rate(params);
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stream_config.ch_count = params_channels(params);
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stream_config.bps = snd_pcm_format_width(params_format(params));
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stream_config.direction = direction;
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num_channels = params_channels(params);
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port_config.ch_mask = (1 << (num_channels)) - 1;
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port_config.num = port;
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retval = sdw_stream_add_slave(rt5682->slave, &stream_config,
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&port_config, 1, stream->sdw_stream);
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if (retval) {
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dev_err(dai->dev, "Unable to configure port\n");
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return retval;
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}
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switch (params_rate(params)) {
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case 48000:
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val_p = RT5682_SDW_REF_1_48K;
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val_c = RT5682_SDW_REF_2_48K;
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break;
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case 96000:
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val_p = RT5682_SDW_REF_1_96K;
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val_c = RT5682_SDW_REF_2_96K;
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break;
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case 192000:
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val_p = RT5682_SDW_REF_1_192K;
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val_c = RT5682_SDW_REF_2_192K;
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break;
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case 32000:
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val_p = RT5682_SDW_REF_1_32K;
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val_c = RT5682_SDW_REF_2_32K;
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break;
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case 24000:
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val_p = RT5682_SDW_REF_1_24K;
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val_c = RT5682_SDW_REF_2_24K;
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break;
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case 16000:
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val_p = RT5682_SDW_REF_1_16K;
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val_c = RT5682_SDW_REF_2_16K;
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break;
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case 12000:
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val_p = RT5682_SDW_REF_1_12K;
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val_c = RT5682_SDW_REF_2_12K;
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break;
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case 8000:
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val_p = RT5682_SDW_REF_1_8K;
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val_c = RT5682_SDW_REF_2_8K;
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break;
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case 44100:
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val_p = RT5682_SDW_REF_1_44K;
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val_c = RT5682_SDW_REF_2_44K;
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break;
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case 88200:
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val_p = RT5682_SDW_REF_1_88K;
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val_c = RT5682_SDW_REF_2_88K;
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break;
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case 176400:
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val_p = RT5682_SDW_REF_1_176K;
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val_c = RT5682_SDW_REF_2_176K;
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break;
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case 22050:
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val_p = RT5682_SDW_REF_1_22K;
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val_c = RT5682_SDW_REF_2_22K;
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break;
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case 11025:
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val_p = RT5682_SDW_REF_1_11K;
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val_c = RT5682_SDW_REF_2_11K;
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break;
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default:
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return -EINVAL;
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}
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if (params_rate(params) <= 48000) {
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osr_p = RT5682_DAC_OSR_D_8;
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osr_c = RT5682_ADC_OSR_D_8;
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} else if (params_rate(params) <= 96000) {
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osr_p = RT5682_DAC_OSR_D_4;
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osr_c = RT5682_ADC_OSR_D_4;
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} else {
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osr_p = RT5682_DAC_OSR_D_2;
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osr_c = RT5682_ADC_OSR_D_2;
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}
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
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regmap_update_bits(rt5682->regmap, RT5682_SDW_REF_CLK,
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RT5682_SDW_REF_1_MASK, val_p);
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regmap_update_bits(rt5682->regmap, RT5682_ADDA_CLK_1,
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RT5682_DAC_OSR_MASK, osr_p);
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} else {
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regmap_update_bits(rt5682->regmap, RT5682_SDW_REF_CLK,
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RT5682_SDW_REF_2_MASK, val_c);
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regmap_update_bits(rt5682->regmap, RT5682_ADDA_CLK_1,
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RT5682_ADC_OSR_MASK, osr_c);
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}
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return retval;
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}
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static int rt5682_sdw_hw_free(struct snd_pcm_substream *substream,
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struct snd_soc_dai *dai)
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{
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struct snd_soc_component *component = dai->component;
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struct rt5682_priv *rt5682 = snd_soc_component_get_drvdata(component);
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struct sdw_stream_data *stream =
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snd_soc_dai_get_dma_data(dai, substream);
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if (!rt5682->slave)
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return -EINVAL;
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sdw_stream_remove_slave(rt5682->slave, stream->sdw_stream);
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return 0;
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}
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static const struct snd_soc_dai_ops rt5682_sdw_ops = {
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.hw_params = rt5682_sdw_hw_params,
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.hw_free = rt5682_sdw_hw_free,
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.set_stream = rt5682_set_sdw_stream,
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.shutdown = rt5682_sdw_shutdown,
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};
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static struct snd_soc_dai_driver rt5682_dai[] = {
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{
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.name = "rt5682-aif1",
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.id = RT5682_AIF1,
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.playback = {
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.stream_name = "AIF1 Playback",
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.channels_min = 1,
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.channels_max = 2,
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.rates = RT5682_STEREO_RATES,
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.formats = RT5682_FORMATS,
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},
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.capture = {
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.stream_name = "AIF1 Capture",
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.channels_min = 1,
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.channels_max = 2,
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.rates = RT5682_STEREO_RATES,
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.formats = RT5682_FORMATS,
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},
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.ops = &rt5682_aif1_dai_ops,
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},
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{
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.name = "rt5682-aif2",
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.id = RT5682_AIF2,
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.capture = {
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.stream_name = "AIF2 Capture",
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.channels_min = 1,
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.channels_max = 2,
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.rates = RT5682_STEREO_RATES,
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.formats = RT5682_FORMATS,
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},
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.ops = &rt5682_aif2_dai_ops,
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},
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{
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.name = "rt5682-sdw",
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.id = RT5682_SDW,
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.playback = {
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.stream_name = "SDW Playback",
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.channels_min = 1,
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.channels_max = 2,
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.rates = RT5682_STEREO_RATES,
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.formats = RT5682_FORMATS,
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},
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.capture = {
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.stream_name = "SDW Capture",
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.channels_min = 1,
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.channels_max = 2,
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.rates = RT5682_STEREO_RATES,
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.formats = RT5682_FORMATS,
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},
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.ops = &rt5682_sdw_ops,
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},
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};
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static int rt5682_sdw_init(struct device *dev, struct regmap *regmap,
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struct sdw_slave *slave)
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{
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struct rt5682_priv *rt5682;
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int ret;
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rt5682 = devm_kzalloc(dev, sizeof(*rt5682), GFP_KERNEL);
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if (!rt5682)
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return -ENOMEM;
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dev_set_drvdata(dev, rt5682);
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rt5682->slave = slave;
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rt5682->sdw_regmap = regmap;
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rt5682->is_sdw = true;
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mutex_init(&rt5682->disable_irq_lock);
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rt5682->regmap = devm_regmap_init(dev, NULL, dev,
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&rt5682_sdw_indirect_regmap);
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if (IS_ERR(rt5682->regmap)) {
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ret = PTR_ERR(rt5682->regmap);
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dev_err(dev, "Failed to allocate register map: %d\n",
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ret);
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return ret;
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}
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/*
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* Mark hw_init to false
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* HW init will be performed when device reports present
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*/
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rt5682->hw_init = false;
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rt5682->first_hw_init = false;
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mutex_init(&rt5682->calibrate_mutex);
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INIT_DELAYED_WORK(&rt5682->jack_detect_work,
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rt5682_jack_detect_handler);
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ret = devm_snd_soc_register_component(dev,
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&rt5682_soc_component_dev,
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rt5682_dai, ARRAY_SIZE(rt5682_dai));
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dev_dbg(&slave->dev, "%s\n", __func__);
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return ret;
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}
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static int rt5682_io_init(struct device *dev, struct sdw_slave *slave)
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{
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struct rt5682_priv *rt5682 = dev_get_drvdata(dev);
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int ret = 0, loop = 10;
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unsigned int val;
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rt5682->disable_irq = false;
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if (rt5682->hw_init)
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return 0;
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/*
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* PM runtime is only enabled when a Slave reports as Attached
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*/
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if (!rt5682->first_hw_init) {
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/* set autosuspend parameters */
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pm_runtime_set_autosuspend_delay(&slave->dev, 3000);
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pm_runtime_use_autosuspend(&slave->dev);
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/* update count of parent 'active' children */
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pm_runtime_set_active(&slave->dev);
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/* make sure the device does not suspend immediately */
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pm_runtime_mark_last_busy(&slave->dev);
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pm_runtime_enable(&slave->dev);
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}
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pm_runtime_get_noresume(&slave->dev);
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if (rt5682->first_hw_init) {
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regcache_cache_only(rt5682->regmap, false);
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regcache_cache_bypass(rt5682->regmap, true);
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}
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while (loop > 0) {
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regmap_read(rt5682->regmap, RT5682_DEVICE_ID, &val);
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if (val == DEVICE_ID)
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break;
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dev_warn(dev, "Device with ID register %x is not rt5682\n", val);
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usleep_range(30000, 30005);
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loop--;
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}
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if (val != DEVICE_ID) {
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dev_err(dev, "Device with ID register %x is not rt5682\n", val);
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ret = -ENODEV;
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goto err_nodev;
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}
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rt5682_calibrate(rt5682);
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if (rt5682->first_hw_init) {
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regcache_cache_bypass(rt5682->regmap, false);
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regcache_mark_dirty(rt5682->regmap);
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regcache_sync(rt5682->regmap);
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/* volatile registers */
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regmap_update_bits(rt5682->regmap, RT5682_CBJ_CTRL_2,
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RT5682_EXT_JD_SRC, RT5682_EXT_JD_SRC_MANUAL);
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goto reinit;
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}
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rt5682_apply_patch_list(rt5682, dev);
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regmap_write(rt5682->regmap, RT5682_DEPOP_1, 0x0000);
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regmap_update_bits(rt5682->regmap, RT5682_PWR_ANLG_1,
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RT5682_LDO1_DVO_MASK | RT5682_HP_DRIVER_MASK,
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RT5682_LDO1_DVO_12 | RT5682_HP_DRIVER_5X);
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regmap_write(rt5682->regmap, RT5682_MICBIAS_2, 0x0080);
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regmap_write(rt5682->regmap, RT5682_TEST_MODE_CTRL_1, 0x0000);
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regmap_update_bits(rt5682->regmap, RT5682_BIAS_CUR_CTRL_8,
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RT5682_HPA_CP_BIAS_CTRL_MASK, RT5682_HPA_CP_BIAS_3UA);
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regmap_update_bits(rt5682->regmap, RT5682_CHARGE_PUMP_1,
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RT5682_CP_CLK_HP_MASK, RT5682_CP_CLK_HP_300KHZ);
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|
regmap_update_bits(rt5682->regmap, RT5682_HP_CHARGE_PUMP_1,
|
|
RT5682_PM_HP_MASK, RT5682_PM_HP_HV);
|
|
|
|
/* Soundwire */
|
|
regmap_write(rt5682->regmap, RT5682_PLL2_INTERNAL, 0xa266);
|
|
regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_1, 0x1700);
|
|
regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_2, 0x0006);
|
|
regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_3, 0x2600);
|
|
regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_4, 0x0c8f);
|
|
regmap_write(rt5682->regmap, RT5682_PLL_TRACK_2, 0x3000);
|
|
regmap_write(rt5682->regmap, RT5682_PLL_TRACK_3, 0x4000);
|
|
regmap_update_bits(rt5682->regmap, RT5682_GLB_CLK,
|
|
RT5682_SCLK_SRC_MASK | RT5682_PLL2_SRC_MASK,
|
|
RT5682_SCLK_SRC_PLL2 | RT5682_PLL2_SRC_SDW);
|
|
|
|
regmap_update_bits(rt5682->regmap, RT5682_CBJ_CTRL_2,
|
|
RT5682_EXT_JD_SRC, RT5682_EXT_JD_SRC_MANUAL);
|
|
regmap_write(rt5682->regmap, RT5682_CBJ_CTRL_1, 0xd142);
|
|
regmap_update_bits(rt5682->regmap, RT5682_CBJ_CTRL_5, 0x0700, 0x0600);
|
|
regmap_update_bits(rt5682->regmap, RT5682_CBJ_CTRL_3,
|
|
RT5682_CBJ_IN_BUF_EN, RT5682_CBJ_IN_BUF_EN);
|
|
regmap_update_bits(rt5682->regmap, RT5682_SAR_IL_CMD_1,
|
|
RT5682_SAR_POW_MASK, RT5682_SAR_POW_EN);
|
|
regmap_update_bits(rt5682->regmap, RT5682_RC_CLK_CTRL,
|
|
RT5682_POW_IRQ | RT5682_POW_JDH |
|
|
RT5682_POW_ANA, RT5682_POW_IRQ |
|
|
RT5682_POW_JDH | RT5682_POW_ANA);
|
|
regmap_update_bits(rt5682->regmap, RT5682_PWR_ANLG_2,
|
|
RT5682_PWR_JDH, RT5682_PWR_JDH);
|
|
regmap_update_bits(rt5682->regmap, RT5682_IRQ_CTRL_2,
|
|
RT5682_JD1_EN_MASK | RT5682_JD1_IRQ_MASK,
|
|
RT5682_JD1_EN | RT5682_JD1_IRQ_PUL);
|
|
|
|
reinit:
|
|
mod_delayed_work(system_power_efficient_wq,
|
|
&rt5682->jack_detect_work, msecs_to_jiffies(250));
|
|
|
|
/* Mark Slave initialization complete */
|
|
rt5682->hw_init = true;
|
|
rt5682->first_hw_init = true;
|
|
|
|
err_nodev:
|
|
pm_runtime_mark_last_busy(&slave->dev);
|
|
pm_runtime_put_autosuspend(&slave->dev);
|
|
|
|
dev_dbg(&slave->dev, "%s hw_init complete: %d\n", __func__, ret);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static bool rt5682_sdw_readable_register(struct device *dev, unsigned int reg)
|
|
{
|
|
switch (reg) {
|
|
case 0x00e0:
|
|
case 0x00f0:
|
|
case 0x3000:
|
|
case 0x3001:
|
|
case 0x3004:
|
|
case 0x3005:
|
|
case 0x3008:
|
|
return true;
|
|
default:
|
|
return false;
|
|
}
|
|
}
|
|
|
|
static const struct regmap_config rt5682_sdw_regmap = {
|
|
.name = "sdw",
|
|
.reg_bits = 32,
|
|
.val_bits = 8,
|
|
.max_register = RT5682_I2C_MODE,
|
|
.readable_reg = rt5682_sdw_readable_register,
|
|
.cache_type = REGCACHE_NONE,
|
|
.use_single_read = true,
|
|
.use_single_write = true,
|
|
};
|
|
|
|
static int rt5682_update_status(struct sdw_slave *slave,
|
|
enum sdw_slave_status status)
|
|
{
|
|
struct rt5682_priv *rt5682 = dev_get_drvdata(&slave->dev);
|
|
|
|
/* Update the status */
|
|
rt5682->status = status;
|
|
|
|
if (status == SDW_SLAVE_UNATTACHED)
|
|
rt5682->hw_init = false;
|
|
|
|
/*
|
|
* Perform initialization only if slave status is present and
|
|
* hw_init flag is false
|
|
*/
|
|
if (rt5682->hw_init || rt5682->status != SDW_SLAVE_ATTACHED)
|
|
return 0;
|
|
|
|
/* perform I/O transfers required for Slave initialization */
|
|
return rt5682_io_init(&slave->dev, slave);
|
|
}
|
|
|
|
static int rt5682_read_prop(struct sdw_slave *slave)
|
|
{
|
|
struct sdw_slave_prop *prop = &slave->prop;
|
|
int nval, i;
|
|
u32 bit;
|
|
unsigned long addr;
|
|
struct sdw_dpn_prop *dpn;
|
|
|
|
prop->scp_int1_mask = SDW_SCP_INT1_IMPL_DEF | SDW_SCP_INT1_BUS_CLASH |
|
|
SDW_SCP_INT1_PARITY;
|
|
prop->quirks = SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY;
|
|
|
|
prop->paging_support = false;
|
|
|
|
/* first we need to allocate memory for set bits in port lists */
|
|
prop->source_ports = 0x4; /* BITMAP: 00000100 */
|
|
prop->sink_ports = 0x2; /* BITMAP: 00000010 */
|
|
|
|
nval = hweight32(prop->source_ports);
|
|
prop->src_dpn_prop = devm_kcalloc(&slave->dev, nval,
|
|
sizeof(*prop->src_dpn_prop),
|
|
GFP_KERNEL);
|
|
if (!prop->src_dpn_prop)
|
|
return -ENOMEM;
|
|
|
|
i = 0;
|
|
dpn = prop->src_dpn_prop;
|
|
addr = prop->source_ports;
|
|
for_each_set_bit(bit, &addr, 32) {
|
|
dpn[i].num = bit;
|
|
dpn[i].type = SDW_DPN_FULL;
|
|
dpn[i].simple_ch_prep_sm = true;
|
|
dpn[i].ch_prep_timeout = 10;
|
|
i++;
|
|
}
|
|
|
|
/* do this again for sink now */
|
|
nval = hweight32(prop->sink_ports);
|
|
prop->sink_dpn_prop = devm_kcalloc(&slave->dev, nval,
|
|
sizeof(*prop->sink_dpn_prop),
|
|
GFP_KERNEL);
|
|
if (!prop->sink_dpn_prop)
|
|
return -ENOMEM;
|
|
|
|
i = 0;
|
|
dpn = prop->sink_dpn_prop;
|
|
addr = prop->sink_ports;
|
|
for_each_set_bit(bit, &addr, 32) {
|
|
dpn[i].num = bit;
|
|
dpn[i].type = SDW_DPN_FULL;
|
|
dpn[i].simple_ch_prep_sm = true;
|
|
dpn[i].ch_prep_timeout = 10;
|
|
i++;
|
|
}
|
|
|
|
/* set the timeout values */
|
|
prop->clk_stop_timeout = 20;
|
|
|
|
/* wake-up event */
|
|
prop->wake_capable = 1;
|
|
|
|
return 0;
|
|
}
|
|
|
|
/* Bus clock frequency */
|
|
#define RT5682_CLK_FREQ_9600000HZ 9600000
|
|
#define RT5682_CLK_FREQ_12000000HZ 12000000
|
|
#define RT5682_CLK_FREQ_6000000HZ 6000000
|
|
#define RT5682_CLK_FREQ_4800000HZ 4800000
|
|
#define RT5682_CLK_FREQ_2400000HZ 2400000
|
|
#define RT5682_CLK_FREQ_12288000HZ 12288000
|
|
|
|
static int rt5682_clock_config(struct device *dev)
|
|
{
|
|
struct rt5682_priv *rt5682 = dev_get_drvdata(dev);
|
|
unsigned int clk_freq, value;
|
|
|
|
clk_freq = (rt5682->params.curr_dr_freq >> 1);
|
|
|
|
switch (clk_freq) {
|
|
case RT5682_CLK_FREQ_12000000HZ:
|
|
value = 0x0;
|
|
break;
|
|
case RT5682_CLK_FREQ_6000000HZ:
|
|
value = 0x1;
|
|
break;
|
|
case RT5682_CLK_FREQ_9600000HZ:
|
|
value = 0x2;
|
|
break;
|
|
case RT5682_CLK_FREQ_4800000HZ:
|
|
value = 0x3;
|
|
break;
|
|
case RT5682_CLK_FREQ_2400000HZ:
|
|
value = 0x4;
|
|
break;
|
|
case RT5682_CLK_FREQ_12288000HZ:
|
|
value = 0x5;
|
|
break;
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
|
|
regmap_write(rt5682->sdw_regmap, 0xe0, value);
|
|
regmap_write(rt5682->sdw_regmap, 0xf0, value);
|
|
|
|
dev_dbg(dev, "%s complete, clk_freq=%d\n", __func__, clk_freq);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int rt5682_bus_config(struct sdw_slave *slave,
|
|
struct sdw_bus_params *params)
|
|
{
|
|
struct rt5682_priv *rt5682 = dev_get_drvdata(&slave->dev);
|
|
int ret;
|
|
|
|
memcpy(&rt5682->params, params, sizeof(*params));
|
|
|
|
ret = rt5682_clock_config(&slave->dev);
|
|
if (ret < 0)
|
|
dev_err(&slave->dev, "Invalid clk config");
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int rt5682_interrupt_callback(struct sdw_slave *slave,
|
|
struct sdw_slave_intr_status *status)
|
|
{
|
|
struct rt5682_priv *rt5682 = dev_get_drvdata(&slave->dev);
|
|
|
|
dev_dbg(&slave->dev,
|
|
"%s control_port_stat=%x", __func__, status->control_port);
|
|
|
|
mutex_lock(&rt5682->disable_irq_lock);
|
|
if (status->control_port & 0x4 && !rt5682->disable_irq) {
|
|
mod_delayed_work(system_power_efficient_wq,
|
|
&rt5682->jack_detect_work, msecs_to_jiffies(rt5682->irq_work_delay_time));
|
|
}
|
|
mutex_unlock(&rt5682->disable_irq_lock);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct sdw_slave_ops rt5682_slave_ops = {
|
|
.read_prop = rt5682_read_prop,
|
|
.interrupt_callback = rt5682_interrupt_callback,
|
|
.update_status = rt5682_update_status,
|
|
.bus_config = rt5682_bus_config,
|
|
};
|
|
|
|
static int rt5682_sdw_probe(struct sdw_slave *slave,
|
|
const struct sdw_device_id *id)
|
|
{
|
|
struct regmap *regmap;
|
|
|
|
/* Regmap Initialization */
|
|
regmap = devm_regmap_init_sdw(slave, &rt5682_sdw_regmap);
|
|
if (IS_ERR(regmap))
|
|
return -EINVAL;
|
|
|
|
rt5682_sdw_init(&slave->dev, regmap, slave);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int rt5682_sdw_remove(struct sdw_slave *slave)
|
|
{
|
|
struct rt5682_priv *rt5682 = dev_get_drvdata(&slave->dev);
|
|
|
|
if (rt5682->hw_init)
|
|
cancel_delayed_work_sync(&rt5682->jack_detect_work);
|
|
|
|
if (rt5682->first_hw_init)
|
|
pm_runtime_disable(&slave->dev);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct sdw_device_id rt5682_id[] = {
|
|
SDW_SLAVE_ENTRY_EXT(0x025d, 0x5682, 0x2, 0, 0),
|
|
{},
|
|
};
|
|
MODULE_DEVICE_TABLE(sdw, rt5682_id);
|
|
|
|
static int __maybe_unused rt5682_dev_suspend(struct device *dev)
|
|
{
|
|
struct rt5682_priv *rt5682 = dev_get_drvdata(dev);
|
|
|
|
if (!rt5682->hw_init)
|
|
return 0;
|
|
|
|
cancel_delayed_work_sync(&rt5682->jack_detect_work);
|
|
|
|
regcache_cache_only(rt5682->regmap, true);
|
|
regcache_mark_dirty(rt5682->regmap);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int __maybe_unused rt5682_dev_system_suspend(struct device *dev)
|
|
{
|
|
struct rt5682_priv *rt5682 = dev_get_drvdata(dev);
|
|
struct sdw_slave *slave = dev_to_sdw_dev(dev);
|
|
int ret;
|
|
|
|
if (!rt5682->hw_init)
|
|
return 0;
|
|
|
|
/*
|
|
* prevent new interrupts from being handled after the
|
|
* deferred work completes and before the parent disables
|
|
* interrupts on the link
|
|
*/
|
|
mutex_lock(&rt5682->disable_irq_lock);
|
|
rt5682->disable_irq = true;
|
|
ret = sdw_update_no_pm(slave, SDW_SCP_INTMASK1,
|
|
SDW_SCP_INT1_IMPL_DEF, 0);
|
|
mutex_unlock(&rt5682->disable_irq_lock);
|
|
|
|
if (ret < 0) {
|
|
/* log but don't prevent suspend from happening */
|
|
dev_dbg(&slave->dev, "%s: could not disable imp-def interrupts\n:", __func__);
|
|
}
|
|
|
|
return rt5682_dev_suspend(dev);
|
|
}
|
|
|
|
static int __maybe_unused rt5682_dev_resume(struct device *dev)
|
|
{
|
|
struct sdw_slave *slave = dev_to_sdw_dev(dev);
|
|
struct rt5682_priv *rt5682 = dev_get_drvdata(dev);
|
|
unsigned long time;
|
|
|
|
if (!rt5682->first_hw_init)
|
|
return 0;
|
|
|
|
if (!slave->unattach_request)
|
|
goto regmap_sync;
|
|
|
|
time = wait_for_completion_timeout(&slave->initialization_complete,
|
|
msecs_to_jiffies(RT5682_PROBE_TIMEOUT));
|
|
if (!time) {
|
|
dev_err(&slave->dev, "Initialization not complete, timed out\n");
|
|
sdw_show_ping_status(slave->bus, true);
|
|
|
|
return -ETIMEDOUT;
|
|
}
|
|
|
|
regmap_sync:
|
|
slave->unattach_request = 0;
|
|
regcache_cache_only(rt5682->regmap, false);
|
|
regcache_sync(rt5682->regmap);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct dev_pm_ops rt5682_pm = {
|
|
SET_SYSTEM_SLEEP_PM_OPS(rt5682_dev_system_suspend, rt5682_dev_resume)
|
|
SET_RUNTIME_PM_OPS(rt5682_dev_suspend, rt5682_dev_resume, NULL)
|
|
};
|
|
|
|
static struct sdw_driver rt5682_sdw_driver = {
|
|
.driver = {
|
|
.name = "rt5682",
|
|
.owner = THIS_MODULE,
|
|
.pm = &rt5682_pm,
|
|
},
|
|
.probe = rt5682_sdw_probe,
|
|
.remove = rt5682_sdw_remove,
|
|
.ops = &rt5682_slave_ops,
|
|
.id_table = rt5682_id,
|
|
};
|
|
module_sdw_driver(rt5682_sdw_driver);
|
|
|
|
MODULE_DESCRIPTION("ASoC RT5682 driver SDW");
|
|
MODULE_AUTHOR("Oder Chiou <oder_chiou@realtek.com>");
|
|
MODULE_LICENSE("GPL v2");
|