John Crispin f40e1f9d85 MIPS: lantiq: enable pci clk conditional for xrx200 SoC ... The xrx200 SoC family has the same PCI clock register layout as the AR9. Enable the same quirk as for AR9 Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4235/		2012-08-23 00:08:18 +02:00
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clk.c	MIPS: lantiq: implement support for clkdev api	2012-05-21 14:31:51 +01:00
dma.c	MIPS: lantiq: convert dma to platform driver	2012-05-21 14:31:51 +01:00
gpio.c	Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus	2012-05-29 18:27:19 -07:00
Makefile	GPIO: MIPS: lantiq: move gpio-stp and gpio-ebu to the subsystem folder	2012-05-21 14:31:52 +01:00
prom.c	MIPS: lantiq: add xway soc ids	2012-05-15 17:49:23 +02:00
reset.c	OF: MIPS: lantiq: implement OF support	2012-05-21 14:31:49 +01:00
sysctrl.c	MIPS: lantiq: enable pci clk conditional for xrx200 SoC	2012-08-23 00:08:18 +02:00