Mathias Thore ba59d57058 net/wan/fsl_ucc_hdlc: error counters ...

Extract error information from rx and tx buffer descriptors,
and update error counters.

Signed-off-by: Mathias Thore <mathias.thore@infinera.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

2018-10-22 19:58:10 -07:00

..

immap_qe.h

soc/fsl/qe: get rid of immrbar_virt_to_phys()

2017-04-30 01:26:54 -05:00

qe_ic.h

…

qe_tdm.h

fsl/qe: Do not prefix header guard with CONFIG_

2016-06-08 11:08:01 -07:00

qe.h

net/wan/fsl_ucc_hdlc: add hdlc-bus support

2017-05-18 10:28:39 -04:00

ucc_fast.h

net/wan/fsl_ucc_hdlc: error counters

2018-10-22 19:58:10 -07:00

ucc_slow.h

…

ucc.h

fsl/qe: setup clock source for TDM mode

2016-06-07 15:56:30 -07:00