Yu Chen f580170f13 usb: dwc3: Add splitdisable quirk for Hisilicon Kirin Soc
SPLIT_BOUNDARY_DISABLE should be set for DesignWare USB3 DRD Core
of Hisilicon Kirin Soc when dwc3 core act as host.

[mchehab: dropped a dev_dbg() as only traces are now allowwed on this driver]

Signed-off-by: Yu Chen <chenyu56@huawei.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-10-02 09:57:45 +03:00
..
2020-05-09 11:05:09 +03:00
2019-05-03 09:13:47 +03:00
2020-10-02 09:43:35 +03:00