Addy Ke f629ba2c04 mmc: dw_mmc: add support for RK3288
This patch focuses on clock setting for RK3288 mmc controller.

In RK3288 mmc controller, CLKDIV register can only be set 0 or 1,
and if DDR 8bit mode, CLKDIV register must be set 1.

Signed-off-by: Addy Ke <addy.ke@rock-chips.com>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-09-09 13:58:59 +02:00
..
2014-09-09 13:58:59 +02:00
2012-01-11 23:58:47 -05:00