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Linus Torvalds f66e797b40 RISC-V Patches for the 5.19 Merge Window, Part 2

This is mostly some DT updates, but also a handful of cleanups and some
 fixes.  The most user-visible of those are:
 
 * A device tree for the Sundance Polarberry, along with a handful of
   fixes and clenups to the PolarFire SOC device trees and bindings.
 * The memfd_secret syscall number is now visible to userspace,
 * Some improvements to the vm layout dump, which really should have
   followed shortly after the sv48 patches but I missed.
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Merge tag 'riscv-for-linus-5.19-mw2' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux

Pull more RISC-V updates from Palmer Dabbelt:
 "This is mostly some DT updates, but also a handful of cleanups and
  some fixes. The most user-visible of those are:

   - A device tree for the Sundance Polarberry, along with a handful of
     fixes and clenups to the PolarFire SOC device trees and bindings.

   - The memfd_secret syscall number is now visible to userspace,

   - Some improvements to the vm layout dump, which really should have
     followed shortly after the sv48 patches but I missed"

* tag 'riscv-for-linus-5.19-mw2' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
  riscv: Move alternative length validation into subsection
  riscv: mm: init: make pt_ops_set_[early|late|fixmap] static
  riscv: move errata/ and kvm/ builds to arch/riscv/Kbuild
  RISC-V: Mark IORESOURCE_EXCLUSIVE for reserved mem instead of IORESOURCE_BUSY
  riscv: Wire up memfd_secret in UAPI header
  riscv: Fix irq_work when SMP is disabled
  riscv: Improve virtual kernel memory layout dump
  riscv: Initialize thread pointer before calling C functions
  Documentation: riscv: Add sv48 description to VM layout
  RISC-V: Only default to spinwait on SBI-0.1 and M-mode
  riscv: dts: icicle: sort nodes alphabetically
  riscv: microchip: icicle: readability fixes
  riscv: dts: microchip: add the sundance polarberry
  dt-bindings: riscv: microchip: add polarberry compatible string
  dt-bindings: vendor-prefixes: add Sundance DSP
  riscv: dts: microchip: make the fabric dtsi board specific
  dt-bindings: riscv: microchip: document icicle reference design
  riscv: dts: microchip: remove soc vendor from filenames
  riscv: dts: microchip: move sysctrlr out of soc bus
  riscv: dts: microchip: remove icicle memory clocks

2022-06-03 14:01:43 -07:00

boot

riscv: dts: icicle: sort nodes alphabetically

2022-06-01 15:28:51 -07:00

configs

RISC-V: configs: Configs that had RPMSG_CHAR now get RPMSG_CTRL

2022-04-26 08:19:53 -07:00

errata

riscv: add memory-type errata for T-Head

2022-05-11 21:36:33 -07:00

include

riscv: Move alternative length validation into subsection