Abhinav Kumar f7b6bf20e2 drm/msm/dsi: implement auto PHY timing calculator for 10nm PHY ...

Currently the DSI PHY timings are hard-coded for a specific panel
for the 10nm PHY.

Replace this with the auto PHY timing calculator which can calculate
the PHY timings for any panel.

Changes in v4:
- None

Changes in v3:
- None

Changes in v2:
- None

Reviewed-by: Sean Paul <seanpaul@chromium.org>
Reviewed-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>

2018-06-03 16:48:59 -04:00

..

phy

drm/msm/dsi: implement auto PHY timing calculator for 10nm PHY

2018-06-03 16:48:59 -04:00

pll

drm/msm/dsi: Populate PLL 10nm clock ops

2018-02-20 10:41:20 -05:00

dsi_cfg.c

drm/msm/dsi: Add SDM845 in dsi_cfg

2018-02-20 10:41:21 -05:00

dsi_cfg.h

drm/msm/dsi: Add SDM845 in dsi_cfg

2018-02-20 10:41:21 -05:00

dsi_host.c

drm/msm/dsi: check video mode engine status before waiting

2018-06-03 16:48:59 -04:00

dsi_manager.c

drm/msm/dsi: correct DSI id bounds check during registration

2018-02-20 10:41:20 -05:00

dsi.c

drm/msm/dsi: Fix potential NULL pointer dereference in msm_dsi_modeset_init

2018-03-19 06:33:34 -04:00

dsi.h

drm/msm/dsi: Add skeleton 10nm PHY/PLL code

2018-02-20 10:41:20 -05:00

dsi.xml.h

drm/msm/dsi: Update generated headers for 10nm PLL/PHY

2018-02-20 10:41:20 -05:00

mmss_cc.xml.h

drm/msm: update generated headers

2017-06-16 11:16:07 -04:00

sfpb.xml.h

drm/msm: update generated headers

2017-06-16 11:16:07 -04:00