cc5b2ad539
On Tegra186 and later, various FUSE offsets are restricted and cannot be accessed from CCPLEX. Currently nvmem binary interface allows reading such offsets from userspace, which results in RAS errors. Add nvmem keepout lists to avoid any reads to restricted offsets. Signed-off-by: Kartik <kkartik@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
139 lines
3.3 KiB
C
139 lines
3.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2010 Google, Inc.
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* Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved.
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*
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* Author:
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* Colin Cross <ccross@android.com>
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*/
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#ifndef __DRIVERS_MISC_TEGRA_FUSE_H
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#define __DRIVERS_MISC_TEGRA_FUSE_H
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#include <linux/dmaengine.h>
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#include <linux/types.h>
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struct nvmem_cell_lookup;
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struct nvmem_device;
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struct tegra_fuse;
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struct tegra_fuse_info {
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u32 (*read)(struct tegra_fuse *fuse, unsigned int offset);
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unsigned int size;
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unsigned int spare;
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};
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struct tegra_fuse_soc {
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void (*init)(struct tegra_fuse *fuse);
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void (*speedo_init)(struct tegra_sku_info *info);
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int (*probe)(struct tegra_fuse *fuse);
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const struct tegra_fuse_info *info;
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const struct nvmem_cell_lookup *lookups;
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unsigned int num_lookups;
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const struct nvmem_cell_info *cells;
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unsigned int num_cells;
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const struct nvmem_keepout *keepouts;
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unsigned int num_keepouts;
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const struct attribute_group *soc_attr_group;
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bool clk_suspend_on;
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};
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struct tegra_fuse {
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struct device *dev;
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void __iomem *base;
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phys_addr_t phys;
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struct clk *clk;
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struct reset_control *rst;
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u32 (*read_early)(struct tegra_fuse *fuse, unsigned int offset);
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u32 (*read)(struct tegra_fuse *fuse, unsigned int offset);
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const struct tegra_fuse_soc *soc;
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/* APBDMA on Tegra20 */
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struct {
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struct mutex lock;
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struct completion wait;
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struct dma_chan *chan;
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struct dma_slave_config config;
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dma_addr_t phys;
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u32 *virt;
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} apbdma;
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struct nvmem_device *nvmem;
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struct nvmem_cell_lookup *lookups;
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};
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void tegra_init_revision(void);
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void tegra_init_apbmisc(void);
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u32 __init tegra_fuse_read_spare(unsigned int spare);
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u32 __init tegra_fuse_read_early(unsigned int offset);
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u8 tegra_get_major_rev(void);
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u8 tegra_get_minor_rev(void);
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extern const struct attribute_group tegra_soc_attr_group;
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#ifdef CONFIG_ARCH_TEGRA_2x_SOC
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void tegra20_init_speedo_data(struct tegra_sku_info *sku_info);
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#endif
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#ifdef CONFIG_ARCH_TEGRA_3x_SOC
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void tegra30_init_speedo_data(struct tegra_sku_info *sku_info);
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#endif
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#ifdef CONFIG_ARCH_TEGRA_114_SOC
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void tegra114_init_speedo_data(struct tegra_sku_info *sku_info);
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#endif
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#if defined(CONFIG_ARCH_TEGRA_124_SOC) || defined(CONFIG_ARCH_TEGRA_132_SOC)
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void tegra124_init_speedo_data(struct tegra_sku_info *sku_info);
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#endif
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#ifdef CONFIG_ARCH_TEGRA_210_SOC
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void tegra210_init_speedo_data(struct tegra_sku_info *sku_info);
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#endif
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#ifdef CONFIG_ARCH_TEGRA_2x_SOC
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extern const struct tegra_fuse_soc tegra20_fuse_soc;
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#endif
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#ifdef CONFIG_ARCH_TEGRA_3x_SOC
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extern const struct tegra_fuse_soc tegra30_fuse_soc;
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#endif
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#ifdef CONFIG_ARCH_TEGRA_114_SOC
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extern const struct tegra_fuse_soc tegra114_fuse_soc;
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#endif
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#if defined(CONFIG_ARCH_TEGRA_124_SOC) || defined(CONFIG_ARCH_TEGRA_132_SOC)
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extern const struct tegra_fuse_soc tegra124_fuse_soc;
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#endif
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#ifdef CONFIG_ARCH_TEGRA_210_SOC
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extern const struct tegra_fuse_soc tegra210_fuse_soc;
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#endif
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#ifdef CONFIG_ARCH_TEGRA_186_SOC
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extern const struct tegra_fuse_soc tegra186_fuse_soc;
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#endif
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#if IS_ENABLED(CONFIG_ARCH_TEGRA_194_SOC) || \
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IS_ENABLED(CONFIG_ARCH_TEGRA_234_SOC)
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extern const struct attribute_group tegra194_soc_attr_group;
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#endif
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#ifdef CONFIG_ARCH_TEGRA_194_SOC
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extern const struct tegra_fuse_soc tegra194_fuse_soc;
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#endif
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#ifdef CONFIG_ARCH_TEGRA_234_SOC
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extern const struct tegra_fuse_soc tegra234_fuse_soc;
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#endif
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#endif
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