The i2c bus on imx6qdl-wandboard has intermittent issues where SDA can freeze on low level at the end of transaction so the bus can no longer work. This impacts reading of EDID data leading to incorrect TV resolution and no audio. This scenario is improved by adding scl/sda gpios definitions to implement the i2c bus recovery mechanism. Signed-off-by: Dima Azarkin <azdmg@outlook.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
379 lines
8.2 KiB
Plaintext
379 lines
8.2 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright 2013 Freescale Semiconductor, Inc.
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*
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* Author: Fabio Estevam <fabio.estevam@freescale.com>
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*/
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#include <dt-bindings/gpio/gpio.h>
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/ {
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chosen {
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stdout-path = &uart1;
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};
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sound {
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compatible = "fsl,imx6-wandboard-sgtl5000",
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"fsl,imx-audio-sgtl5000";
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model = "imx6-wandboard-sgtl5000";
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ssi-controller = <&ssi1>;
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audio-codec = <&codec>;
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audio-routing =
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"MIC_IN", "Mic Jack",
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"Mic Jack", "Mic Bias",
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"Headphone Jack", "HP_OUT";
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mux-int-port = <1>;
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mux-ext-port = <3>;
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};
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sound-spdif {
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compatible = "fsl,imx-audio-spdif";
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model = "imx-spdif";
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spdif-controller = <&spdif>;
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spdif-out;
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};
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reg_1p5v: regulator-1p5v {
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compatible = "regulator-fixed";
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regulator-name = "1P5V";
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regulator-min-microvolt = <1500000>;
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regulator-max-microvolt = <1500000>;
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regulator-always-on;
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};
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reg_1p8v: regulator-1p8v {
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compatible = "regulator-fixed";
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regulator-name = "1P8V";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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reg_2p8v: regulator-2p8v {
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compatible = "regulator-fixed";
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regulator-name = "2P8V";
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regulator-min-microvolt = <2800000>;
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regulator-max-microvolt = <2800000>;
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regulator-always-on;
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};
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reg_2p5v: regulator-2p5v {
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compatible = "regulator-fixed";
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regulator-name = "2P5V";
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regulator-min-microvolt = <2500000>;
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regulator-max-microvolt = <2500000>;
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regulator-always-on;
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};
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reg_3p3v: regulator-3p3v {
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compatible = "regulator-fixed";
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regulator-name = "3P3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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reg_usb_otg_vbus: regulator-usbotgvbus {
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compatible = "regulator-fixed";
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regulator-name = "usb_otg_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usbotgvbus>;
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gpio = <&gpio3 22 GPIO_ACTIVE_LOW>;
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};
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};
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&audmux {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_audmux>;
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status = "okay";
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};
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&hdmi {
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ddc-i2c-bus = <&i2c1>;
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status = "okay";
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};
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&i2c1 {
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clock-frequency = <100000>;
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pinctrl-names = "default", "gpio";
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pinctrl-0 = <&pinctrl_i2c1>;
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pinctrl-1 = <&pinctrl_i2c1_gpio>;
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scl-gpios = <&gpio3 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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sda-gpios = <&gpio3 28 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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status = "okay";
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};
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&i2c2 {
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clock-frequency = <100000>;
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pinctrl-names = "default", "gpio";
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pinctrl-0 = <&pinctrl_i2c2>;
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pinctrl-1 = <&pinctrl_i2c2_gpio>;
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scl-gpios = <&gpio4 12 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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sda-gpios = <&gpio4 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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status = "okay";
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codec: sgtl5000@a {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_mclk>;
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compatible = "fsl,sgtl5000";
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reg = <0x0a>;
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clocks = <&clks IMX6QDL_CLK_CKO>;
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VDDA-supply = <®_2p5v>;
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VDDIO-supply = <®_3p3v>;
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lrclk-strength = <3>;
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};
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camera@3c {
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compatible = "ovti,ov5645";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ov5645>;
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reg = <0x3c>;
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clocks = <&clks IMX6QDL_CLK_CKO2>;
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clock-names = "xclk";
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clock-frequency = <24000000>;
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vdddo-supply = <®_1p8v>;
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vdda-supply = <®_2p8v>;
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vddd-supply = <®_1p5v>;
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enable-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
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reset-gpios = <&gpio4 14 GPIO_ACTIVE_LOW>;
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port {
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ov5645_to_mipi_csi2: endpoint {
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remote-endpoint = <&mipi_csi2_in>;
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clock-lanes = <0>;
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data-lanes = <1 2>;
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};
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};
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};
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};
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&iomuxc {
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pinctrl-names = "default";
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imx6qdl-wandboard {
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pinctrl_audmux: audmuxgrp {
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fsl,pins = <
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MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
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MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
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MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
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MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
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>;
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};
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pinctrl_enet: enetgrp {
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fsl,pins = <
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MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
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MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
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MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
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MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
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MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
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MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
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MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
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MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
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MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
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MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
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MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
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MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
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MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
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MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
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MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
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MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
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>;
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};
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pinctrl_i2c1: i2c1grp {
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fsl,pins = <
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MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
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MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
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>;
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};
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pinctrl_i2c1_gpio: i2c1gpiogrp {
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fsl,pins = <
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MX6QDL_PAD_EIM_D21__GPIO3_IO21 0x4001b8b0
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MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x4001b8b0
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>;
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};
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pinctrl_i2c2: i2c2grp {
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fsl,pins = <
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MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
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MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
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>;
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};
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pinctrl_i2c2_gpio: i2c2gpiogrp {
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fsl,pins = <
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MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x4001b8b0
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MX6QDL_PAD_KEY_ROW3__GPIO4_IO13 0x4001b8b0
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>;
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};
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pinctrl_mclk: mclkgrp {
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fsl,pins = <
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MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
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>;
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};
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pinctrl_ov5645: ov5645grp {
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fsl,pins = <
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MX6QDL_PAD_GPIO_3__CCM_CLKO2 0x000b0
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MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1b0b0
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MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x1b0b0
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>;
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};
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pinctrl_spdif: spdifgrp {
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fsl,pins = <
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MX6QDL_PAD_ENET_RXD0__SPDIF_OUT 0x1b0b0
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>;
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};
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pinctrl_uart1: uart1grp {
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fsl,pins = <
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MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
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MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
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>;
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};
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pinctrl_uart3: uart3grp {
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fsl,pins = <
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MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
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MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
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MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1
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MX6QDL_PAD_EIM_EB3__UART3_RTS_B 0x1b0b1
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>;
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};
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pinctrl_usbotg: usbotggrp {
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fsl,pins = <
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MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
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>;
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};
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pinctrl_usbotgvbus: usbotgvbusgrp {
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fsl,pins = <
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MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x130b0
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>;
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};
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pinctrl_usdhc1: usdhc1grp {
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fsl,pins = <
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MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059
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MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059
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MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
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MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
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MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
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MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
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>;
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};
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pinctrl_usdhc2: usdhc2grp {
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fsl,pins = <
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MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
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MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
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MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
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MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
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MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
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MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
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>;
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};
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pinctrl_usdhc3: usdhc3grp {
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fsl,pins = <
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MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
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MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
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MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
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MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
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MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
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MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
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>;
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};
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};
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};
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&fec {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_enet>;
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phy-mode = "rgmii-id";
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phy-handle = <ðphy>;
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phy-reset-gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
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status = "okay";
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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ethphy: ethernet-phy@1 {
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reg = <1>;
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};
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};
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};
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&mipi_csi {
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status = "okay";
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port@0 {
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reg = <0>;
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mipi_csi2_in: endpoint {
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remote-endpoint = <&ov5645_to_mipi_csi2>;
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clock-lanes = <0>;
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data-lanes = <1 2>;
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};
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};
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};
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&spdif {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_spdif>;
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status = "okay";
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};
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&ssi1 {
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status = "okay";
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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status = "okay";
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};
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&uart3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart3>;
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uart-has-rtscts;
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status = "okay";
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};
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&usbh1 {
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status = "okay";
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};
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&usbotg {
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vbus-supply = <®_usb_otg_vbus>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usbotg>;
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disable-over-current;
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dr_mode = "otg";
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status = "okay";
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};
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&usdhc1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc1>;
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cd-gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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&usdhc3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc3>;
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cd-gpios = <&gpio3 9 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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