linux/Documentation/devicetree/bindings/mtd/intel,lgm-ebunand.yaml
Miquel Raynal 1dcd314282 dt-bindings: mtd: intel: Prevent NAND chip unevaluated properties
nand-ecc-mode is a generic property which may apply to any raw NAND
chip, it does not need to be listed in each controller
description. Instead, let's reference the raw NAND chip description file
which contains the property. The description contained
"additionalProperties: false" which is wrong as other properties such as
partitions might very well be added in the final .dts, and anyway needs
to be converted into "unexpectedProperties: false" to fit the property
change new requirements.

Cc: Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/linux-mtd/20230619092916.3028470-13-miquel.raynal@bootlin.com
2023-06-22 23:08:31 +02:00

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YAML

# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/mtd/intel,lgm-ebunand.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Intel LGM SoC NAND Controller
allOf:
- $ref: nand-controller.yaml
maintainers:
- Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
properties:
compatible:
const: intel,lgm-ebunand
reg:
maxItems: 6
reg-names:
items:
- const: ebunand
- const: hsnand
- const: nand_cs0
- const: nand_cs1
- const: addr_sel0
- const: addr_sel1
clocks:
maxItems: 1
dmas:
maxItems: 2
dma-names:
items:
- const: tx
- const: rx
patternProperties:
"^nand@[a-f0-9]$":
type: object
$ref: raw-nand-chip.yaml
properties:
reg:
minimum: 0
maximum: 1
nand-ecc-algo:
const: hw
unevaluatedProperties: false
required:
- compatible
- reg
- reg-names
- clocks
- dmas
- dma-names
unevaluatedProperties: false
examples:
- |
nand-controller@e0f00000 {
compatible = "intel,lgm-ebunand";
reg = <0xe0f00000 0x100>,
<0xe1000000 0x300>,
<0xe1400000 0x8000>,
<0xe1c00000 0x1000>,
<0x17400000 0x4>,
<0x17c00000 0x4>;
reg-names = "ebunand", "hsnand", "nand_cs0", "nand_cs1",
"addr_sel0", "addr_sel1";
clocks = <&cgu0 125>;
dmas = <&dma0 8>, <&dma0 9>;
dma-names = "tx", "rx";
#address-cells = <1>;
#size-cells = <0>;
nand@0 {
reg = <0>;
nand-ecc-mode = "hw";
};
};
...