17049bf9de
The active_discharge_on setting was missed, so output discharge resistor
is always disabled. Fix it.
Fixes: 0555d41497
("regulator: rtq2134: Add support for Richtek RTQ2134 SubPMIC")
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Link: https://lore.kernel.org/r/20220404022514.449231-1-axel.lin@ingics.com
Signed-off-by: Mark Brown <broonie@kernel.org>
375 lines
11 KiB
C
375 lines
11 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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#include <linux/bitops.h>
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#include <linux/i2c.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/regmap.h>
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#include <linux/regulator/driver.h>
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enum {
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RTQ2134_IDX_BUCK1 = 0,
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RTQ2134_IDX_BUCK2,
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RTQ2134_IDX_BUCK3,
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RTQ2134_IDX_MAX
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};
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#define RTQ2134_AUTO_MODE 0
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#define RTQ2134_FCCM_MODE 1
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#define RTQ2134_BUCK_DVS0_CTRL 0
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#define RTQ2134_BUCK_VSEL_CTRL 2
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#define RTQ2134_REG_IO_CHIPNAME 0x01
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#define RTQ2134_REG_FLT_RECORDTEMP 0x13
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#define RTQ2134_REG_FLT_RECORDBUCK(_id) (0x14 + (_id))
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#define RTQ2134_REG_FLT_BUCKCTRL(_id) (0x37 + (_id))
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#define RTQ2134_REG_BUCK1_CFG0 0x42
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#define RTQ2134_REG_BUCK1_DVS0CFG1 0x48
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#define RTQ2134_REG_BUCK1_DVS0CFG0 0x49
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#define RTQ2134_REG_BUCK1_DVS1CFG1 0x4A
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#define RTQ2134_REG_BUCK1_DVS1CFG0 0x4B
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#define RTQ2134_REG_BUCK1_DVSCFG 0x52
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#define RTQ2134_REG_BUCK1_RSPCFG 0x54
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#define RTQ2134_REG_BUCK2_CFG0 0x5F
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#define RTQ2134_REG_BUCK2_DVS0CFG1 0x62
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#define RTQ2134_REG_BUCK2_DVS0CFG0 0x63
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#define RTQ2134_REG_BUCK2_DVS1CFG1 0x64
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#define RTQ2134_REG_BUCK2_DVS1CFG0 0x65
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#define RTQ2134_REG_BUCK2_DVSCFG 0x6C
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#define RTQ2134_REG_BUCK2_RSPCFG 0x6E
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#define RTQ2134_REG_BUCK3_CFG0 0x79
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#define RTQ2134_REG_BUCK3_DVS0CFG1 0x7C
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#define RTQ2134_REG_BUCK3_DVS0CFG0 0x7D
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#define RTQ2134_REG_BUCK3_DVS1CFG1 0x7E
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#define RTQ2134_REG_BUCK3_DVS1CFG0 0x7F
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#define RTQ2134_REG_BUCK3_DVSCFG 0x86
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#define RTQ2134_REG_BUCK3_RSPCFG 0x88
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#define RTQ2134_REG_BUCK3_SLEWCTRL 0x89
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#define RTQ2134_VOUT_MAXNUM 256
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#define RTQ2134_VOUT_MASK 0xFF
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#define RTQ2134_VOUTEN_MASK BIT(0)
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#define RTQ2134_ACTDISCHG_MASK BIT(0)
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#define RTQ2134_RSPUP_MASK GENMASK(6, 4)
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#define RTQ2134_FCCM_MASK BIT(5)
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#define RTQ2134_UVHICCUP_MASK BIT(3)
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#define RTQ2134_BUCKDVS_CTRL_MASK GENMASK(1, 0)
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#define RTQ2134_CHIPOT_MASK BIT(2)
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#define RTQ2134_BUCKOV_MASK BIT(5)
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#define RTQ2134_BUCKUV_MASK BIT(4)
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struct rtq2134_regulator_desc {
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struct regulator_desc desc;
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/* Extension for proprietary register and mask */
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unsigned int mode_reg;
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unsigned int mode_mask;
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unsigned int suspend_enable_reg;
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unsigned int suspend_enable_mask;
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unsigned int suspend_vsel_reg;
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unsigned int suspend_vsel_mask;
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unsigned int suspend_mode_reg;
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unsigned int suspend_mode_mask;
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unsigned int dvs_ctrl_reg;
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};
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static int rtq2134_buck_set_mode(struct regulator_dev *rdev, unsigned int mode)
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{
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struct rtq2134_regulator_desc *desc =
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(struct rtq2134_regulator_desc *)rdev->desc;
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unsigned int val;
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if (mode == REGULATOR_MODE_NORMAL)
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val = RTQ2134_AUTO_MODE;
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else if (mode == REGULATOR_MODE_FAST)
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val = RTQ2134_FCCM_MODE;
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else
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return -EINVAL;
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val <<= ffs(desc->mode_mask) - 1;
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return regmap_update_bits(rdev->regmap, desc->mode_reg, desc->mode_mask,
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val);
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}
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static unsigned int rtq2134_buck_get_mode(struct regulator_dev *rdev)
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{
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struct rtq2134_regulator_desc *desc =
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(struct rtq2134_regulator_desc *)rdev->desc;
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unsigned int mode;
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int ret;
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ret = regmap_read(rdev->regmap, desc->mode_reg, &mode);
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if (ret)
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return ret;
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if (mode & desc->mode_mask)
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return REGULATOR_MODE_FAST;
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return REGULATOR_MODE_NORMAL;
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}
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static int rtq2134_buck_set_suspend_voltage(struct regulator_dev *rdev, int uV)
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{
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struct rtq2134_regulator_desc *desc =
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(struct rtq2134_regulator_desc *)rdev->desc;
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int sel;
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sel = regulator_map_voltage_linear_range(rdev, uV, uV);
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if (sel < 0)
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return sel;
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sel <<= ffs(desc->suspend_vsel_mask) - 1;
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return regmap_update_bits(rdev->regmap, desc->suspend_vsel_reg,
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desc->suspend_vsel_mask, sel);
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}
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static int rtq2134_buck_set_suspend_enable(struct regulator_dev *rdev)
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{
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struct rtq2134_regulator_desc *desc =
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(struct rtq2134_regulator_desc *)rdev->desc;
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unsigned int val = desc->suspend_enable_mask;
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return regmap_update_bits(rdev->regmap, desc->suspend_enable_reg,
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desc->suspend_enable_mask, val);
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}
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static int rtq2134_buck_set_suspend_disable(struct regulator_dev *rdev)
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{
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struct rtq2134_regulator_desc *desc =
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(struct rtq2134_regulator_desc *)rdev->desc;
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return regmap_update_bits(rdev->regmap, desc->suspend_enable_reg,
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desc->suspend_enable_mask, 0);
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}
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static int rtq2134_buck_set_suspend_mode(struct regulator_dev *rdev,
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unsigned int mode)
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{
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struct rtq2134_regulator_desc *desc =
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(struct rtq2134_regulator_desc *)rdev->desc;
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unsigned int val;
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if (mode == REGULATOR_MODE_NORMAL)
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val = RTQ2134_AUTO_MODE;
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else if (mode == REGULATOR_MODE_FAST)
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val = RTQ2134_FCCM_MODE;
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else
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return -EINVAL;
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val <<= ffs(desc->suspend_mode_mask) - 1;
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return regmap_update_bits(rdev->regmap, desc->suspend_mode_reg,
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desc->suspend_mode_mask, val);
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}
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static int rtq2134_buck_get_error_flags(struct regulator_dev *rdev,
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unsigned int *flags)
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{
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int rid = rdev_get_id(rdev);
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unsigned int chip_error, buck_error, events = 0;
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int ret;
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ret = regmap_read(rdev->regmap, RTQ2134_REG_FLT_RECORDTEMP,
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&chip_error);
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if (ret) {
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dev_err(&rdev->dev, "Failed to get chip error flag\n");
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return ret;
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}
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ret = regmap_read(rdev->regmap, RTQ2134_REG_FLT_RECORDBUCK(rid),
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&buck_error);
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if (ret) {
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dev_err(&rdev->dev, "Failed to get buck error flag\n");
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return ret;
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}
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if (chip_error & RTQ2134_CHIPOT_MASK)
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events |= REGULATOR_ERROR_OVER_TEMP;
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if (buck_error & RTQ2134_BUCKUV_MASK)
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events |= REGULATOR_ERROR_UNDER_VOLTAGE;
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if (buck_error & RTQ2134_BUCKOV_MASK)
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events |= REGULATOR_ERROR_REGULATION_OUT;
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*flags = events;
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return 0;
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}
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static const struct regulator_ops rtq2134_buck_ops = {
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.list_voltage = regulator_list_voltage_linear_range,
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.set_voltage_sel = regulator_set_voltage_sel_regmap,
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.get_voltage_sel = regulator_get_voltage_sel_regmap,
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.enable = regulator_enable_regmap,
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.disable = regulator_disable_regmap,
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.is_enabled = regulator_is_enabled_regmap,
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.set_active_discharge = regulator_set_active_discharge_regmap,
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.set_ramp_delay = regulator_set_ramp_delay_regmap,
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.set_mode = rtq2134_buck_set_mode,
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.get_mode = rtq2134_buck_get_mode,
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.set_suspend_voltage = rtq2134_buck_set_suspend_voltage,
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.set_suspend_enable = rtq2134_buck_set_suspend_enable,
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.set_suspend_disable = rtq2134_buck_set_suspend_disable,
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.set_suspend_mode = rtq2134_buck_set_suspend_mode,
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.get_error_flags = rtq2134_buck_get_error_flags,
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};
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static const struct linear_range rtq2134_buck_vout_ranges[] = {
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REGULATOR_LINEAR_RANGE(300000, 0, 200, 5000),
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REGULATOR_LINEAR_RANGE(1310000, 201, 255, 10000)
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};
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static unsigned int rtq2134_buck_of_map_mode(unsigned int mode)
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{
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switch (mode) {
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case RTQ2134_AUTO_MODE:
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return REGULATOR_MODE_NORMAL;
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case RTQ2134_FCCM_MODE:
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return REGULATOR_MODE_FAST;
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}
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return REGULATOR_MODE_INVALID;
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}
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static int rtq2134_buck_of_parse_cb(struct device_node *np,
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const struct regulator_desc *desc,
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struct regulator_config *cfg)
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{
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struct rtq2134_regulator_desc *rdesc =
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(struct rtq2134_regulator_desc *)desc;
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int rid = desc->id;
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bool uv_shutdown, vsel_dvs;
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unsigned int val;
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int ret;
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vsel_dvs = of_property_read_bool(np, "richtek,use-vsel-dvs");
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if (vsel_dvs)
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val = RTQ2134_BUCK_VSEL_CTRL;
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else
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val = RTQ2134_BUCK_DVS0_CTRL;
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ret = regmap_update_bits(cfg->regmap, rdesc->dvs_ctrl_reg,
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RTQ2134_BUCKDVS_CTRL_MASK, val);
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if (ret)
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return ret;
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uv_shutdown = of_property_read_bool(np, "richtek,uv-shutdown");
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if (uv_shutdown)
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val = 0;
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else
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val = RTQ2134_UVHICCUP_MASK;
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return regmap_update_bits(cfg->regmap, RTQ2134_REG_FLT_BUCKCTRL(rid),
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RTQ2134_UVHICCUP_MASK, val);
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}
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static const unsigned int rtq2134_buck_ramp_delay_table[] = {
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0, 16000, 0, 8000, 4000, 2000, 1000, 500
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};
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#define RTQ2134_BUCK_DESC(_id) { \
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.desc = { \
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.name = "rtq2134_buck" #_id, \
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.of_match = of_match_ptr("buck" #_id), \
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.regulators_node = of_match_ptr("regulators"), \
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.id = RTQ2134_IDX_BUCK##_id, \
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.type = REGULATOR_VOLTAGE, \
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.owner = THIS_MODULE, \
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.ops = &rtq2134_buck_ops, \
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.n_voltages = RTQ2134_VOUT_MAXNUM, \
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.linear_ranges = rtq2134_buck_vout_ranges, \
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.n_linear_ranges = ARRAY_SIZE(rtq2134_buck_vout_ranges), \
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.vsel_reg = RTQ2134_REG_BUCK##_id##_DVS0CFG1, \
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.vsel_mask = RTQ2134_VOUT_MASK, \
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.enable_reg = RTQ2134_REG_BUCK##_id##_DVS0CFG0, \
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.enable_mask = RTQ2134_VOUTEN_MASK, \
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.active_discharge_reg = RTQ2134_REG_BUCK##_id##_CFG0, \
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.active_discharge_mask = RTQ2134_ACTDISCHG_MASK, \
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.active_discharge_on = RTQ2134_ACTDISCHG_MASK, \
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.ramp_reg = RTQ2134_REG_BUCK##_id##_RSPCFG, \
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.ramp_mask = RTQ2134_RSPUP_MASK, \
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.ramp_delay_table = rtq2134_buck_ramp_delay_table, \
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.n_ramp_values = ARRAY_SIZE(rtq2134_buck_ramp_delay_table), \
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.of_map_mode = rtq2134_buck_of_map_mode, \
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.of_parse_cb = rtq2134_buck_of_parse_cb, \
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}, \
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.mode_reg = RTQ2134_REG_BUCK##_id##_DVS0CFG0, \
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.mode_mask = RTQ2134_FCCM_MASK, \
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.suspend_mode_reg = RTQ2134_REG_BUCK##_id##_DVS1CFG0, \
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.suspend_mode_mask = RTQ2134_FCCM_MASK, \
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.suspend_enable_reg = RTQ2134_REG_BUCK##_id##_DVS1CFG0, \
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.suspend_enable_mask = RTQ2134_VOUTEN_MASK, \
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.suspend_vsel_reg = RTQ2134_REG_BUCK##_id##_DVS1CFG1, \
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.suspend_vsel_mask = RTQ2134_VOUT_MASK, \
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.dvs_ctrl_reg = RTQ2134_REG_BUCK##_id##_DVSCFG, \
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}
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static const struct rtq2134_regulator_desc rtq2134_regulator_descs[] = {
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RTQ2134_BUCK_DESC(1),
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RTQ2134_BUCK_DESC(2),
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RTQ2134_BUCK_DESC(3)
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};
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static bool rtq2134_is_accissible_reg(struct device *dev, unsigned int reg)
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{
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if (reg >= RTQ2134_REG_IO_CHIPNAME && reg <= RTQ2134_REG_BUCK3_SLEWCTRL)
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return true;
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return false;
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}
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static const struct regmap_config rtq2134_regmap_config = {
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.reg_bits = 8,
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.val_bits = 8,
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.max_register = RTQ2134_REG_BUCK3_SLEWCTRL,
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.readable_reg = rtq2134_is_accissible_reg,
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.writeable_reg = rtq2134_is_accissible_reg,
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};
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static int rtq2134_probe(struct i2c_client *i2c)
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{
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struct regmap *regmap;
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struct regulator_dev *rdev;
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struct regulator_config regulator_cfg = {};
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int i;
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regmap = devm_regmap_init_i2c(i2c, &rtq2134_regmap_config);
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if (IS_ERR(regmap)) {
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dev_err(&i2c->dev, "Failed to allocate regmap\n");
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return PTR_ERR(regmap);
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}
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regulator_cfg.dev = &i2c->dev;
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regulator_cfg.regmap = regmap;
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for (i = 0; i < ARRAY_SIZE(rtq2134_regulator_descs); i++) {
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rdev = devm_regulator_register(&i2c->dev,
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&rtq2134_regulator_descs[i].desc,
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®ulator_cfg);
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if (IS_ERR(rdev)) {
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dev_err(&i2c->dev, "Failed to init %d regulator\n", i);
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return PTR_ERR(rdev);
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}
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}
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return 0;
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}
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static const struct of_device_id __maybe_unused rtq2134_device_tables[] = {
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{ .compatible = "richtek,rtq2134", },
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{}
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};
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MODULE_DEVICE_TABLE(of, rtq2134_device_tables);
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static struct i2c_driver rtq2134_driver = {
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.driver = {
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.name = "rtq2134",
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.of_match_table = rtq2134_device_tables,
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},
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.probe_new = rtq2134_probe,
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};
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module_i2c_driver(rtq2134_driver);
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MODULE_AUTHOR("ChiYuan Huang <cy_huang@richtek.com>");
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MODULE_DESCRIPTION("Richtek RTQ2134 Regulator Driver");
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MODULE_LICENSE("GPL v2");
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