Stefan Agner f93500f430 drm/fsl-dcu: add extra clock for pixel clock ...

The Vybrid DCU variant has two independent clock inputs, one
for the registers (IPG bus clock) and one for the pixel clock.
Support this distinction in the DCU DRM driver while staying
backward compatible for old device trees.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stefan Agner <stefan@agner.ch>

2016-04-25 20:27:18 -07:00

..

fsl_dcu_drm_crtc.c

drm/fsl-dcu: add extra clock for pixel clock

2016-04-25 20:27:18 -07:00

fsl_dcu_drm_crtc.h

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fsl_dcu_drm_drv.c

drm/fsl-dcu: add extra clock for pixel clock

2016-04-25 20:27:18 -07:00

fsl_dcu_drm_drv.h

drm/fsl-dcu: add extra clock for pixel clock

2016-04-25 20:27:18 -07:00

fsl_dcu_drm_fbdev.c

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fsl_dcu_drm_kms.c

drm/fsl-dcu: handle initialization errors properly

2016-02-25 16:13:16 -08:00

fsl_dcu_drm_output.h

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fsl_dcu_drm_plane.c

drm/fsl-dcu: fix alpha blending

2016-02-25 16:13:16 -08:00

fsl_dcu_drm_plane.h

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fsl_dcu_drm_rgb.c

drm: Pass 'name' to drm_encoder_init()

2015-12-11 09:13:20 +01:00

Kconfig

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Makefile

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