0417a86b20
MSM DSI host driver actually parses "data-lanes" in DT and compare it with the number of DSI lanes the bridge driver sets for mipi_dsi_device. So we need to always specify "data-lanes" for the DSI host output. As of now, "data-lanes" is added to ti-sn65dsi86 dts fragment, but missing in parade-ps8640 dts fragment, which requires a fixup. Since we'll do 4-lane DSI regardless of which bridge chip is used, instead of adding "data-lanes" to parade-ps8640 dts fragment, let's just move "data-lanes" from the bridge dts to sc7180-trogdor.dtsi. Signed-off-by: Philip Chen <philipchen@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211029152647.v3.2.If23c83a786fc4d318a1986f43803f22b4b1d82cd@changeid
92 lines
1.6 KiB
Plaintext
92 lines
1.6 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
|
/*
|
|
* Google Trogdor dts fragment for the boards with TI sn65dsi86 edp bridge
|
|
*
|
|
* Copyright 2021 Google LLC.
|
|
*/
|
|
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
|
|
&dsi0_out {
|
|
remote-endpoint = <&sn65dsi86_in>;
|
|
};
|
|
|
|
edp_brij_i2c: &i2c2 {
|
|
status = "okay";
|
|
clock-frequency = <400000>;
|
|
|
|
sn65dsi86_bridge: bridge@2d {
|
|
compatible = "ti,sn65dsi86";
|
|
reg = <0x2d>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&edp_brij_en>, <&edp_brij_irq>;
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
|
|
interrupt-parent = <&tlmm>;
|
|
interrupts = <11 IRQ_TYPE_LEVEL_HIGH>;
|
|
|
|
enable-gpios = <&tlmm 104 GPIO_ACTIVE_HIGH>;
|
|
|
|
vpll-supply = <&pp1800_edp_vpll>;
|
|
vccio-supply = <&pp1800_brij_vccio>;
|
|
vcca-supply = <&pp1200_brij>;
|
|
vcc-supply = <&pp1200_brij>;
|
|
|
|
clocks = <&rpmhcc RPMH_LN_BB_CLK3>;
|
|
clock-names = "refclk";
|
|
|
|
no-hpd;
|
|
|
|
ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
sn65dsi86_in: endpoint {
|
|
remote-endpoint = <&dsi0_out>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
sn65dsi86_out: endpoint {
|
|
data-lanes = <0 1>;
|
|
remote-endpoint = <&panel_in_edp>;
|
|
};
|
|
};
|
|
};
|
|
|
|
aux-bus {
|
|
panel: panel {
|
|
/* Compatible will be filled in per-board */
|
|
power-supply = <&pp3300_dx_edp>;
|
|
backlight = <&backlight>;
|
|
hpd-gpios = <&sn65dsi86_bridge 2 GPIO_ACTIVE_HIGH>;
|
|
|
|
port {
|
|
panel_in_edp: endpoint {
|
|
remote-endpoint = <&sn65dsi86_out>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&tlmm {
|
|
edp_brij_irq: edp-brij-irq {
|
|
pinmux {
|
|
pins = "gpio11";
|
|
function = "gpio";
|
|
};
|
|
|
|
pinconf {
|
|
pins = "gpio11";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
};
|