0e3d4373b8
For B4 platform, MPIC EISR register is in reversed bitmap order, instead of "Error interrupt source 0-31. Bit 0 represents SRC0." the correct ordering is "Error interrupt source 0-31. Bit 0 represents SRC31." This patch is to fix sRIO EISR bit value of error interrupt in dts node. Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
143 lines
4.2 KiB
Plaintext
143 lines
4.2 KiB
Plaintext
/*
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* B4860 Silicon/SoC Device Tree Source (post include)
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*
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* Copyright 2012 Freescale Semiconductor Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* * Neither the name of Freescale Semiconductor nor the
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* names of its contributors may be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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*
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* ALTERNATIVELY, this software may be distributed under the terms of the
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* GNU General Public License ("GPL") as published by the Free Software
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* Foundation, either version 2 of that License or (at your option) any
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* later version.
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*
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* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
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* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/include/ "b4si-post.dtsi"
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/* controller at 0x200000 */
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&pci0 {
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compatible = "fsl,b4860-pcie", "fsl,qoriq-pcie-v2.4";
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};
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&rio {
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compatible = "fsl,srio";
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interrupts = <16 2 1 20>;
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#address-cells = <2>;
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#size-cells = <2>;
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fsl,iommu-parent = <&pamu0>;
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ranges;
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port1 {
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#address-cells = <2>;
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#size-cells = <2>;
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cell-index = <1>;
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fsl,liodn-reg = <&guts 0x510>; /* RIO1LIODNR */
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};
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port2 {
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#address-cells = <2>;
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#size-cells = <2>;
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cell-index = <2>;
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fsl,liodn-reg = <&guts 0x514>; /* RIO2LIODNR */
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};
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};
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&dcsr {
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dcsr-epu@0 {
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compatible = "fsl,b4860-dcsr-epu", "fsl,dcsr-epu";
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};
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dcsr-npc {
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compatible = "fsl,b4860-dcsr-cnpc", "fsl,dcsr-cnpc";
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};
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dcsr-dpaa@9000 {
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compatible = "fsl,b4860-dcsr-dpaa", "fsl,dcsr-dpaa";
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};
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dcsr-ocn@11000 {
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compatible = "fsl,b4860-dcsr-ocn", "fsl,dcsr-ocn";
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};
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dcsr-ddr@13000 {
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compatible = "fsl,dcsr-ddr";
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dev-handle = <&ddr2>;
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reg = <0x13000 0x1000>;
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};
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dcsr-nal@18000 {
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compatible = "fsl,b4860-dcsr-nal", "fsl,dcsr-nal";
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};
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dcsr-rcpm@22000 {
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compatible = "fsl,b4860-dcsr-rcpm", "fsl,dcsr-rcpm";
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};
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dcsr-snpc@30000 {
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compatible = "fsl,b4860-dcsr-snpc", "fsl,dcsr-snpc";
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};
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dcsr-snpc@31000 {
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compatible = "fsl,b4860-dcsr-snpc", "fsl,dcsr-snpc";
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};
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dcsr-cpu-sb-proxy@108000 {
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compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
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cpu-handle = <&cpu1>;
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reg = <0x108000 0x1000 0x109000 0x1000>;
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};
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dcsr-cpu-sb-proxy@110000 {
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compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
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cpu-handle = <&cpu2>;
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reg = <0x110000 0x1000 0x111000 0x1000>;
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};
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dcsr-cpu-sb-proxy@118000 {
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compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
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cpu-handle = <&cpu3>;
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reg = <0x118000 0x1000 0x119000 0x1000>;
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};
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};
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&soc {
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ddr2: memory-controller@9000 {
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compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
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reg = <0x9000 0x1000>;
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interrupts = <16 2 1 9>;
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};
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cpc: l3-cache-controller@10000 {
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compatible = "fsl,b4860-l3-cache-controller", "cache";
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};
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corenet-cf@18000 {
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compatible = "fsl,b4860-corenet-cf";
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};
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guts: global-utilities@e0000 {
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compatible = "fsl,b4860-device-config", "fsl,qoriq-device-config-2.0";
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};
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clockgen: global-utilities@e1000 {
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compatible = "fsl,b4860-clockgen", "fsl,qoriq-clockgen-2.0";
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};
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rcpm: global-utilities@e2000 {
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compatible = "fsl,b4860-rcpm", "fsl,qoriq-rcpm-2.0";
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};
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L2: l2-cache-controller@c20000 {
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compatible = "fsl,b4860-l2-cache-controller";
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};
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};
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