f0b0b48d10
The localbus node should be in at 0xfffe05000 not 0xffe05000. Also fixed the names of the localbus and pci nodes to reflect the addresses they are actually at. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
110 lines
2.6 KiB
Plaintext
110 lines
2.6 KiB
Plaintext
/*
|
|
* MPC8536DS Device Tree Source (36-bit address map)
|
|
*
|
|
* Copyright 2008-2009, 2011 Freescale Semiconductor, Inc.
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify it
|
|
* under the terms of the GNU General Public License as published by the
|
|
* Free Software Foundation; either version 2 of the License, or (at your
|
|
* option) any later version.
|
|
*/
|
|
|
|
/include/ "fsl/mpc8536si-pre.dtsi"
|
|
|
|
/ {
|
|
model = "fsl,mpc8536ds";
|
|
compatible = "fsl,mpc8536ds";
|
|
|
|
cpus {
|
|
#cpus = <1>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
PowerPC,8536@0 {
|
|
device_type = "cpu";
|
|
reg = <0>;
|
|
next-level-cache = <&L2>;
|
|
};
|
|
};
|
|
|
|
memory {
|
|
device_type = "memory";
|
|
reg = <0 0 0 0>; // Filled by U-Boot
|
|
};
|
|
|
|
lbc: localbus@fffe05000 {
|
|
reg = <0xf 0xffe05000 0 0x1000>;
|
|
|
|
ranges = <0x0 0x0 0xf 0xe8000000 0x08000000
|
|
0x2 0x0 0xf 0xffa00000 0x00040000
|
|
0x3 0x0 0xf 0xffdf0000 0x00008000>;
|
|
};
|
|
|
|
board_soc: soc: soc@fffe00000 {
|
|
ranges = <0x0 0xf 0xffe00000 0x100000>;
|
|
};
|
|
|
|
pci0: pci@fffe08000 {
|
|
reg = <0xf 0xffe08000 0 0x1000>;
|
|
ranges = <0x02000000 0 0xf0000000 0xc 0x00000000 0 0x10000000
|
|
0x01000000 0 0x00000000 0xf 0xffc00000 0 0x00010000>;
|
|
clock-frequency = <66666666>;
|
|
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
|
|
interrupt-map = <
|
|
|
|
/* IDSEL 0x11 J17 Slot 1 */
|
|
0x8800 0 0 1 &mpic 1 1 0 0
|
|
0x8800 0 0 2 &mpic 2 1 0 0
|
|
0x8800 0 0 3 &mpic 3 1 0 0
|
|
0x8800 0 0 4 &mpic 4 1 0 0>;
|
|
};
|
|
|
|
pci1: pcie@fffe09000 {
|
|
reg = <0xf 0xffe09000 0 0x1000>;
|
|
ranges = <0x02000000 0 0xf8000000 0xc 0x18000000 0 0x08000000
|
|
0x01000000 0 0x00000000 0xf 0xffc20000 0 0x00010000>;
|
|
pcie@0 {
|
|
ranges = <0x02000000 0 0xf8000000
|
|
0x02000000 0 0xf8000000
|
|
0 0x08000000
|
|
|
|
0x01000000 0 0x00000000
|
|
0x01000000 0 0x00000000
|
|
0 0x00010000>;
|
|
};
|
|
};
|
|
|
|
pci2: pcie@fffe0a000 {
|
|
reg = <0xf 0xffe0a000 0 0x1000>;
|
|
ranges = <0x02000000 0 0xf8000000 0xc 0x10000000 0 0x08000000
|
|
0x01000000 0 0x00000000 0xf 0xffc10000 0 0x00010000>;
|
|
pcie@0 {
|
|
ranges = <0x02000000 0 0xf8000000
|
|
0x02000000 0 0xf8000000
|
|
0 0x08000000
|
|
|
|
0x01000000 0 0x00000000
|
|
0x01000000 0 0x00000000
|
|
0 0x00010000>;
|
|
};
|
|
};
|
|
|
|
pci3: pcie@fffe0b000 {
|
|
reg = <0xf 0xffe0b000 0 0x1000>;
|
|
ranges = <0x02000000 0 0xe0000000 0xc 0x20000000 0 0x20000000
|
|
0x01000000 0 0x00000000 0xf 0xffc30000 0 0x00010000>;
|
|
pcie@0 {
|
|
ranges = <0x02000000 0 0xe0000000
|
|
0x02000000 0 0xe0000000
|
|
0 0x20000000
|
|
|
|
0x01000000 0 0x00000000
|
|
0x01000000 0 0x00000000
|
|
0 0x00100000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
/include/ "fsl/mpc8536si-post.dtsi"
|
|
/include/ "mpc8536ds.dtsi"
|