1. Minor fix in order of initializing pinctrl driver - GPIOs should be configured before registering gpiolib. 2. Final steps to deprecated bindings headers with register constants. The constants were moved to include files in DTS directories, because these are not suitable for bindings. Remove final references and mark binding header as deprecated to warn any users. -----BEGIN PGP SIGNATURE----- iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmMbWHIQHGtyemtAa2Vy bmVsLm9yZwAKCRDBN2bmhouD16J7EACBiMzTW1s6h2Z+/8yu3D8dhyy184Lykj/3 tf4mR3fEEX7svUbcll08hquMCgeZ5dZeowgfBN0ylhPetT6E5y0EgBAAR5C6r8I1 0ZbnaFbiSapo4Y3E0ZbhQxE+/Vq6/WCYw43KJEmU8EjFIhogyyOlt2HWKfHTKDlq 5b+amkNOuZ6ERhvhpyH//bwdjSCdz2RsPlv+a63VJxfrU5P78opp9+25DJbIpLD3 SdBDwRI/A0YN6zEpoX+NnqyevmSsTVu1BAh0fiFca0uqimwrkeOlqsKMXlS8/B7F 3YP7RVFFHkWFt+dHp4hPHlREaAEfkCUoJgozKV/wCC+DRG1lvLQ2KZhJ8F+kjnSb fHJ9xqf0BFh7RQszOd/Odn1wqSESTAKADq/m5abwy+cdHhQwfLVyEzeFs7foLMHa K1QzP4Ta/AviRclVz3Y9Joxeo1LMgejMqrnE0biSc/d5vDVbr1xynurPzqym9wbh q2Mh1aP0pSMTjr5+umb3BAd3pQsDSzrhjFUeeLRb5RN5EgOsNRTGnvk7AGKMMo2J ZEQOrbjHHLZxHx+2E1SS11haXYv2EhBa+13xJv7jZFKtiW7bboBJs9/5MwdG71fP HegPLggmDa2MSHuAzE5mDPy7N8429Kq61XFWOGv4aA0kK4M55qyuoyIJSCbhFsfz qwueV7J3oQ== =YIgT -----END PGP SIGNATURE----- Merge tag 'samsung-pinctrl-6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/samsung into devel Samsung pinctrl drivers changes for v6.1 1. Minor fix in order of initializing pinctrl driver - GPIOs should be configured before registering gpiolib. 2. Final steps to deprecated bindings headers with register constants. The constants were moved to include files in DTS directories, because these are not suitable for bindings. Remove final references and mark binding header as deprecated to warn any users.
388 lines
11 KiB
YAML
388 lines
11 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pinctrl/samsung,pinctrl.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Samsung S3C/S5P/Exynos SoC pin controller
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maintainers:
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- Krzysztof Kozlowski <krzk@kernel.org>
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- Sylwester Nawrocki <s.nawrocki@samsung.com>
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- Tomasz Figa <tomasz.figa@gmail.com>
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description: |
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This is a part of device tree bindings for Samsung S3C/S5P/Exynos SoC pin
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controller.
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All the pin controller nodes should be represented in the aliases node using
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the following format 'pinctrl{n}' where n is a unique number for the alias.
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The controller supports three types of interrupts::
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- External GPIO interrupts (see interrupts property in pin controller node);
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- External wake-up interrupts - multiplexed (capable of waking up the system
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see interrupts property in external wake-up interrupt controller node -
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samsung,pinctrl-wakeup-interrupt.yaml);
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- External wake-up interrupts - direct (capable of waking up the system, see
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interrupts property in every bank of pin controller with external wake-up
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interrupt controller - samsung,pinctrl-gpio-bank.yaml).
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properties:
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$nodename:
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pattern: "^pinctrl(@.*)?"
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compatible:
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enum:
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- samsung,s3c2412-pinctrl
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- samsung,s3c2416-pinctrl
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- samsung,s3c2440-pinctrl
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- samsung,s3c2450-pinctrl
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- samsung,s3c64xx-pinctrl
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- samsung,s5pv210-pinctrl
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- samsung,exynos3250-pinctrl
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- samsung,exynos4210-pinctrl
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- samsung,exynos4x12-pinctrl
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- samsung,exynos5250-pinctrl
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- samsung,exynos5260-pinctrl
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- samsung,exynos5410-pinctrl
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- samsung,exynos5420-pinctrl
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- samsung,exynos5433-pinctrl
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- samsung,exynos7-pinctrl
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- samsung,exynos7885-pinctrl
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- samsung,exynos850-pinctrl
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- samsung,exynosautov9-pinctrl
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- tesla,fsd-pinctrl
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interrupts:
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description:
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Required for GPIO banks supporting external GPIO interrupts.
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maxItems: 1
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power-domains:
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maxItems: 1
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reg:
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description:
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Second base address of the pin controller if the specific registers of
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the pin controller are separated into the different base address.
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Only certain banks of certain pin controller might need it.
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minItems: 1
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maxItems: 2
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wakeup-interrupt-controller:
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$ref: samsung,pinctrl-wakeup-interrupt.yaml
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patternProperties:
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"^[a-z]+[0-9]*-gpio-bank$":
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description:
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Pin banks of the controller are represented by child nodes of the
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controller node. Bank name is taken from name of the node.
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$ref: samsung,pinctrl-gpio-bank.yaml
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"^[a-z0-9-]+-pins$":
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oneOf:
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- $ref: samsung,pinctrl-pins-cfg.yaml
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required:
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- samsung,pins
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- type: object
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patternProperties:
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"^[a-z0-9-]+-pins$":
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$ref: samsung,pinctrl-pins-cfg.yaml
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additionalProperties: false
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"^(initial|sleep)-state$":
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type: object
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additionalProperties: false
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patternProperties:
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"^(pin-[a-z0-9-]+|[a-z0-9-]+-pin)$":
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$ref: samsung,pinctrl-pins-cfg.yaml
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properties:
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samsung,pins:
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description: See samsung,pinctrl-pins-cfg.yaml
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$ref: /schemas/types.yaml#/definitions/string-array
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maxItems: 1
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required:
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- samsung,pins
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unevaluatedProperties: false
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required:
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- compatible
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- reg
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allOf:
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- $ref: "pinctrl.yaml#"
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- if:
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properties:
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compatible:
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contains:
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const: samsung,exynos5433-pinctrl
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then:
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properties:
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reg:
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minItems: 1
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maxItems: 2
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else:
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properties:
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reg:
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minItems: 1
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maxItems: 1
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additionalProperties: false
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examples:
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- |
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pinctrl@7f008000 {
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compatible = "samsung,s3c64xx-pinctrl";
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reg = <0x7f008000 0x1000>;
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interrupt-parent = <&vic1>;
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interrupts = <21>;
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wakeup-interrupt-controller {
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compatible = "samsung,s3c64xx-wakeup-eint";
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interrupts-extended = <&vic0 0>,
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<&vic0 1>,
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<&vic1 0>,
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<&vic1 1>;
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};
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/* Pin bank with external GPIO or muxed external wake-up interrupts */
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gpa-gpio-bank {
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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// ...
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uart0-data-pins {
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samsung,pins = "gpa-0", "gpa-1";
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samsung,pin-function = <2>;
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samsung,pin-pud = <0>;
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};
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// ...
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};
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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pinctrl@11400000 {
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compatible = "samsung,exynos4210-pinctrl";
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reg = <0x11400000 0x1000>;
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interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&sleep0>;
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/* Pin bank with external GPIO or muxed external wake-up interrupts */
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gpa0-gpio-bank {
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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// ...
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uart0-data-pins {
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samsung,pins = "gpa0-0", "gpa0-1";
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samsung,pin-function = <2>;
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samsung,pin-pud = <0>;
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samsung,pin-drv = <0>;
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};
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// ...
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sleep0: sleep-state {
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gpa0-0-pin {
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samsung,pins = "gpa0-0";
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samsung,pin-con-pdn = <2>;
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samsung,pin-pud-pdn = <0>;
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};
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gpa0-1-pin {
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samsung,pins = "gpa0-1";
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samsung,pin-con-pdn = <0>;
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samsung,pin-pud-pdn = <0>;
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};
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// ...
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};
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};
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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pinctrl@11000000 {
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compatible = "samsung,exynos4210-pinctrl";
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reg = <0x11000000 0x1000>;
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interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
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wakeup-interrupt-controller {
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compatible = "samsung,exynos4210-wakeup-eint";
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interrupt-parent = <&gic>;
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interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
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};
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/* Pin bank with external GPIO or muxed external wake-up interrupts */
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gpj0-gpio-bank {
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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/* Pin bank without external interrupts */
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gpy0-gpio-bank {
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gpio-controller;
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#gpio-cells = <2>;
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};
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/* Pin bank with external direct wake-up interrupts */
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gpx0-gpio-bank {
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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interrupt-parent = <&gic>;
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interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
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#interrupt-cells = <2>;
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};
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// ...
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sd0-clk-pins {
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samsung,pins = "gpk0-0";
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samsung,pin-function = <2>;
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samsung,pin-pud = <0>;
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samsung,pin-drv = <3>;
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};
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sd4-bus-width8-pins {
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part-1-pins {
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samsung,pins = "gpk0-3", "gpk0-4",
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"gpk0-5", "gpk0-6";
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samsung,pin-function = <3>;
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samsung,pin-pud = <3>;
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samsung,pin-drv = <3>;
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};
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part-2-pins {
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samsung,pins = "gpk1-3", "gpk1-4",
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"gpk1-5", "gpk1-6";
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samsung,pin-function = <4>;
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samsung,pin-pud = <3>;
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samsung,pin-drv = <3>;
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};
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};
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// ...
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otg-gp-pins {
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samsung,pins = "gpx3-3";
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samsung,pin-function = <1>;
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samsung,pin-pud = <0>;
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samsung,pin-drv = <0>;
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samsung,pin-val = <0>;
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};
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};
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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pinctrl@10580000 {
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compatible = "samsung,exynos5433-pinctrl";
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reg = <0x10580000 0x1a20>, <0x11090000 0x100>;
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pinctrl-names = "default";
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pinctrl-0 = <&initial_alive>;
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wakeup-interrupt-controller {
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compatible = "samsung,exynos7-wakeup-eint";
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interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
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};
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/* Pin bank with external direct wake-up interrupts */
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gpa0-gpio-bank {
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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interrupt-parent = <&gic>;
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interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
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#interrupt-cells = <2>;
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};
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// ...
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te-irq-pins {
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samsung,pins = "gpf1-3";
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samsung,pin-function = <0xf>;
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};
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// ..
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initial_alive: initial-state {
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gpa0-0-pin {
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samsung,pins = "gpa0-0";
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samsung,pin-function = <0>;
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samsung,pin-pud = <1>;
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samsung,pin-drv = <0>;
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};
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// ...
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};
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};
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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pinctrl@114b0000 {
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compatible = "samsung,exynos5433-pinctrl";
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reg = <0x114b0000 0x1000>;
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interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
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power-domains = <&pd_aud>;
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/* Pin bank with external GPIO or muxed external wake-up interrupts */
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gpz0-gpio-bank {
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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// ...
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i2s0-bus-pins {
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samsung,pins = "gpz0-0", "gpz0-1", "gpz0-2", "gpz0-3",
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"gpz0-4", "gpz0-5", "gpz0-6";
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samsung,pin-function = <2>;
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samsung,pin-pud = <0>;
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samsung,pin-drv = <0>;
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};
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// ...
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};
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