IF YOU WOULD LIKE TO GET AN ACCOUNT, please write an
email to Administrator. User accounts are meant only to access repo
and report issues and/or generate pull requests.
This is a purpose-specific Git hosting for
BaseALT
projects. Thank you for your understanding!
Только зарегистрированные пользователи имеют доступ к сервису!
Для получения аккаунта, обратитесь к администратору.
According to an old GPL'ed driver at
<ftp://ftp.mccdaq.com/downloads/iotech_software/DaqBoard_1000_2000_Series/Linux_driver_kernelv2.4.x/>,
The CPLD status register can be checked to make sure that it is ready to
accept the next 16-bit word of FPGA firmware data, but that doesn't work
on older versions of the CPLD, where a simple delay should be used
between successive writes. The current version of the Comedi driver
just uses a delay between successive writes. Change it to check for the
newer CPLD in the `daqboard2000_load_firmware()`, and change the
firmware word writing function `daqboard2000_write_cpld()` to wait for
the status bit (`DB2K_CPLD_STATUS_TXREADY`, previously called
`DB2K_CPLD_TXDONE`) to be set for newer CPLD, or just delay for older CPLD.
Return an error if it times out waiting for the status bit.
The wait for the `DB2K_CPLD_STATUS_TXREADY` status bit to be set is
performed by new function `daqboard2000_wait_cpld_txready()`, which
returns 0 if the status bit is set within 100 microseconds, or
`-ETIMEDOUT` if not.
Signed-off-by: Ian Abbott <abbotti@mev.co.uk>
Reviewed-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
fba4e898b9