Alexander Shishkin fc027f4ce7 intel_th: Add "rtit" source device ...

In some versions of Intel TH, the Software Trace Hub (STH) has a second
MMIO BAR dedicated to the input from Intel PT. This calls for a new
subdevice that will be enumerated if the corresponding BAR is present.

Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

2019-05-03 18:14:29 +02:00

..

acpi.c

intel_th: Rework resource passing between glue layers and core

2019-05-03 18:14:29 +02:00

core.c

intel_th: Add "rtit" source device

2019-05-03 18:14:29 +02:00

debug.c

intel_th: Add SPDX GPL-2.0 header to replace GPLv2 boilerplate

2018-03-28 18:47:19 +03:00

debug.h

intel_th: Add SPDX GPL-2.0 header to replace GPLv2 boilerplate

2018-03-28 18:47:19 +03:00

gth.c

intel_th: gth: Fix an off-by-one in output unassigning

2019-03-01 09:20:38 +01:00

gth.h

intel_th: Add SPDX GPL-2.0 header to replace GPLv2 boilerplate

2018-03-28 18:47:19 +03:00

intel_th.h

intel_th: Add "rtit" source device

2019-05-03 18:14:29 +02:00

Kconfig

intel_th: Add ACPI glue layer

2018-03-28 18:47:23 +03:00

Makefile

intel_th: Add ACPI glue layer

2018-03-28 18:47:23 +03:00

msu.c

intel_th: msu: Fix single mode with IOMMU

2019-05-03 18:14:29 +02:00

msu.h

intel_th: Add SPDX GPL-2.0 header to replace GPLv2 boilerplate

2018-03-28 18:47:19 +03:00

pci.c

intel_th: Add "rtit" source device

2019-05-03 18:14:29 +02:00

pti.c

intel_th: pti: Use sysfs_match_string() helper

2019-02-21 15:04:36 +02:00

pti.h

intel_th: Add SPDX GPL-2.0 header to replace GPLv2 boilerplate

2018-03-28 18:47:19 +03:00

sth.c

intel_th: Mark expected switch fall-throughs

2019-02-21 15:04:36 +02:00

sth.h

intel_th: Add SPDX GPL-2.0 header to replace GPLv2 boilerplate

2018-03-28 18:47:19 +03:00