fccb9a81fd
MADT contains the information for MPIDR which is essential for SMP initialization, parse the GIC cpu interface structures to get the MPIDR value and map it to cpu_logical_map(), and add enabled cpu with valid MPIDR into cpu_possible_map. ACPI 5.1 only has two explicit methods to boot up SMP, PSCI and Parking protocol, but the Parking protocol is only specified for ARMv7 now, so make PSCI as the only way for the SMP boot protocol before some updates for the ACPI spec or the Parking protocol spec. Parking protocol patches for SMP boot will be sent to upstream when the new version of Parking protocol is ready. CC: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> CC: Catalin Marinas <catalin.marinas@arm.com> CC: Will Deacon <will.deacon@arm.com> CC: Mark Rutland <mark.rutland@arm.com> Tested-by: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> Tested-by: Yijing Wang <wangyijing@huawei.com> Tested-by: Mark Langsdorf <mlangsdo@redhat.com> Tested-by: Jon Masters <jcm@redhat.com> Tested-by: Timur Tabi <timur@codeaurora.org> Tested-by: Robert Richter <rrichter@cavium.com> Acked-by: Robert Richter <rrichter@cavium.com> Acked-by: Olof Johansson <olof@lixom.net> Reviewed-by: Grant Likely <grant.likely@linaro.org> Signed-off-by: Hanjun Guo <hanjun.guo@linaro.org> Signed-off-by: Tomasz Nowicki <tomasz.nowicki@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
83 lines
2.2 KiB
C
83 lines
2.2 KiB
C
/*
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* Copyright (C) 2013-2014, Linaro Ltd.
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* Author: Al Stone <al.stone@linaro.org>
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* Author: Graeme Gregory <graeme.gregory@linaro.org>
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* Author: Hanjun Guo <hanjun.guo@linaro.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation;
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*/
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#ifndef _ASM_ACPI_H
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#define _ASM_ACPI_H
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#include <linux/mm.h>
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/* Basic configuration for ACPI */
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#ifdef CONFIG_ACPI
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/* ACPI table mapping after acpi_gbl_permanent_mmap is set */
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static inline void __iomem *acpi_os_ioremap(acpi_physical_address phys,
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acpi_size size)
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{
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if (!page_is_ram(phys >> PAGE_SHIFT))
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return ioremap(phys, size);
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return ioremap_cache(phys, size);
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}
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#define acpi_os_ioremap acpi_os_ioremap
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#define acpi_strict 1 /* No out-of-spec workarounds on ARM64 */
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extern int acpi_disabled;
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extern int acpi_noirq;
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extern int acpi_pci_disabled;
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/* 1 to indicate PSCI 0.2+ is implemented */
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static inline bool acpi_psci_present(void)
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{
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return acpi_gbl_FADT.arm_boot_flags & ACPI_FADT_PSCI_COMPLIANT;
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}
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/* 1 to indicate HVC must be used instead of SMC as the PSCI conduit */
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static inline bool acpi_psci_use_hvc(void)
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{
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return acpi_gbl_FADT.arm_boot_flags & ACPI_FADT_PSCI_USE_HVC;
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}
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static inline void disable_acpi(void)
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{
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acpi_disabled = 1;
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acpi_pci_disabled = 1;
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acpi_noirq = 1;
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}
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static inline void enable_acpi(void)
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{
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acpi_disabled = 0;
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acpi_pci_disabled = 0;
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acpi_noirq = 0;
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}
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/*
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* It's used from ACPI core in kdump to boot UP system with SMP kernel,
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* with this check the ACPI core will not override the CPU index
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* obtained from GICC with 0 and not print some error message as well.
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* Since MADT must provide at least one GICC structure for GIC
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* initialization, CPU will be always available in MADT on ARM64.
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*/
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static inline bool acpi_has_cpu_in_madt(void)
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{
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return true;
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}
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static inline void arch_fix_phys_package_id(int num, u32 slot) { }
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void __init acpi_init_cpus(void);
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#else
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static inline bool acpi_psci_present(void) { return false; }
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static inline bool acpi_psci_use_hvc(void) { return false; }
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static inline void acpi_init_cpus(void) { }
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#endif /* CONFIG_ACPI */
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#endif /*_ASM_ACPI_H*/
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