fd470a8bee
Unlike Intel's Enhanced IBRS feature, AMD's Automatic IBRS does not
provide protection to processes running at CPL3/user mode, see section
"Extended Feature Enable Register (EFER)" in the APM v2 at
https://bugzilla.kernel.org/attachment.cgi?id=304652
Explicitly enable STIBP to protect against cross-thread CPL3
branch target injections on systems with Automatic IBRS enabled.
Also update the relevant documentation.
Fixes:
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.. | ||
core-scheduling.rst | ||
cross-thread-rsb.rst | ||
index.rst | ||
l1d_flush.rst | ||
l1tf.rst | ||
mds.rst | ||
multihit.rst | ||
processor_mmio_stale_data.rst | ||
special-register-buffer-data-sampling.rst | ||
spectre.rst | ||
tsx_async_abort.rst |