Jisheng Zhang ff4b8cad3a

riscv: add gpr-num.h ...

This defines the mapping from ABI names to X registers.

Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>

2022-01-05 17:53:05 -08:00

..

boot

RISC-V DTS changes for v5.16

2021-10-21 08:22:37 -07:00

configs

riscv: defconfig: enable DRM_NOUVEAU

2021-10-27 14:36:09 -07:00

errata

riscv: skip errata_cip_453.o if CONFIG_ERRATA_SIFIVE_CIP_453 is disabled

2021-06-01 21:16:41 -07:00

include

riscv: add gpr-num.h

2022-01-05 17:53:05 -08:00

kernel

riscv: extable: add type and data fields

2022-01-05 17:52:54 -08:00

kvm

RISC-V: KVM: fix boolreturn.cocci warnings

2021-11-01 17:35:17 +05:30

lib

riscv: extable: consolidate definitions

2022-01-05 17:52:47 -08:00

mm

riscv: extable: add type and data fields

2022-01-05 17:52:54 -08:00

net

riscv: extable: add type and data fields

2022-01-05 17:52:54 -08:00

Kbuild

kbuild: use more subdir- for visiting subdirectories while cleaning

2021-10-24 13:49:46 +09:00

Kconfig

RISC-V Patches for the 5.16 Merge Window, Part 1

2021-11-13 09:15:42 -08:00

Kconfig.debug

RISC-V: Remove EARLY_PRINTK support

2018-12-17 10:23:46 -08:00

Kconfig.erratas

riscv: enable SiFive errata CIP-453 and CIP-1200 Kconfig only if CONFIG_64BIT=y

2021-05-06 09:40:13 -07:00

Kconfig.socs

riscv: sifive: fix Kconfig errata warning

2021-06-12 17:20:50 -07:00

Makefile

RISC-V Patches for the 5.16 Merge Window, Part 1

2021-11-13 09:15:42 -08:00