b9595d1211
The CIR controller in the Allwinner F1C100s series of SoCs is compatible to the ones used in other Allwinner SoCs. Add the respective compatible name to the existing IR binding, and pair it with the A31 fallback compatible string. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221107005433.11079-6-andre.przywara@arm.com Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
79 lines
1.6 KiB
YAML
79 lines
1.6 KiB
YAML
# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/media/allwinner,sun4i-a10-ir.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Allwinner A10 Infrared Controller
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maintainers:
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- Chen-Yu Tsai <wens@csie.org>
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- Maxime Ripard <mripard@kernel.org>
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allOf:
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- $ref: "rc.yaml#"
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properties:
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compatible:
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oneOf:
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- const: allwinner,sun4i-a10-ir
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- const: allwinner,sun5i-a13-ir
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- const: allwinner,sun6i-a31-ir
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- items:
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- enum:
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- allwinner,suniv-f1c100s-ir
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- allwinner,sun8i-a83t-ir
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- allwinner,sun8i-r40-ir
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- allwinner,sun50i-a64-ir
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- allwinner,sun50i-h6-ir
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- allwinner,sun50i-h616-ir
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- const: allwinner,sun6i-a31-ir
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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items:
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- description: Bus Clock
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- description: Module Clock
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clock-names:
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items:
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- const: apb
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- const: ir
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resets:
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maxItems: 1
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clock-frequency:
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default: 8000000
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description:
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IR Receiver clock frequency, in Hertz.
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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unevaluatedProperties: false
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examples:
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- |
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ir0: ir@1c21800 {
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compatible = "allwinner,sun4i-a10-ir";
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clocks = <&apb0_gates 6>, <&ir0_clk>;
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clock-names = "apb", "ir";
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clock-frequency = <3000000>;
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resets = <&apb0_rst 1>;
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interrupts = <0 5 1>;
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reg = <0x01C21800 0x40>;
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linux,rc-map-name = "rc-rc6-mce";
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};
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...
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