Heiko Stuebner ff689fd21c riscv: add RISC-V Svpbmt extension support ... Svpbmt (the S should be capitalized) is the "Supervisor-mode: page-based memory types" extension that specifies attributes for cacheability, idempotency and ordering. The relevant settings are done in special bits in PTEs: Here is the svpbmt PTE format: | 63 | 62-61 | 60-8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 N MT RSW D A G U X W R V ^ Of the Reserved bits [63:54] in a leaf PTE, the high bit is already allocated (as the N bit), so bits [62:61] are used as the MT (aka MemType) field. This field specifies one of three memory types that are close equivalents (or equivalent in effect) to the three main x86 and ARMv8 memory types - as shown in the following table. RISC-V Encoding & MemType RISC-V Description ---------- ------------------------------------------------ 00 - PMA Normal Cacheable, No change to implied PMA memory type 01 - NC Non-cacheable, idempotent, weakly-ordered Main Memory 10 - IO Non-cacheable, non-idempotent, strongly-ordered I/O memory 11 - Rsvd Reserved for future standard use As the extension will not be present on all implementations, implement a method to handle cpufeatures via alternatives to not incur runtime penalties on cpu variants not supporting specific extensions and patch relevant code parts at runtime. Co-developed-by: Wei Fu <wefu@redhat.com> Signed-off-by: Wei Fu <wefu@redhat.com> Co-developed-by: Liu Shaohua <liush@allwinnertech.com> Signed-off-by: Liu Shaohua <liush@allwinnertech.com> Co-developed-by: Guo Ren <guoren@kernel.org> Signed-off-by: Guo Ren <guoren@kernel.org> [moved to use the alternatives mechanism] Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Philipp Tomsich <philipp.tomsich@vrull.eu> Link: https://lore.kernel.org/r/20220511192921.2223629-10-heiko@sntech.de Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>		2022-05-11 21:36:33 -07:00
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boot	RISC-V Patches for the 5.18 Merge Window, Part 2	2022-04-01 13:31:57 -07:00
configs	RISC-V: K210 defconfigs: Drop redundant MEMBARRIER=n	2022-03-31 17:19:27 -07:00
errata	riscv: implement module alternatives	2022-05-11 21:36:31 -07:00
include	riscv: add RISC-V Svpbmt extension support	2022-05-11 21:36:33 -07:00
kernel	riscv: add RISC-V Svpbmt extension support	2022-05-11 21:36:33 -07:00
kvm	RISC-V: KVM: Implement SBI HSM suspend call	2022-03-11 19:02:39 +05:30
lib	riscv: Fixed misaligned memory access. Fixed pointer comparison.	2022-03-10 10:24:04 -08:00
mm	RISC-V Patches for the 5.18 Merge Window, Part 1	2022-03-25 10:11:38 -07:00
net	riscv: bpf: Fix eBPF's exception tables	2022-01-19 10:50:02 -08:00
Kbuild	kbuild: use more subdir- for visiting subdirectories while cleaning	2021-10-24 13:49:46 +09:00
Kconfig	riscv: add RISC-V Svpbmt extension support	2022-05-11 21:36:33 -07:00
Kconfig.debug	RISC-V: Remove EARLY_PRINTK support	2018-12-17 10:23:46 -08:00
Kconfig.erratas	riscv: integrate alternatives better into the main architecture	2022-05-11 21:36:31 -07:00
Kconfig.socs	riscv: integrate alternatives better into the main architecture	2022-05-11 21:36:31 -07:00
Makefile	riscv: integrate alternatives better into the main architecture	2022-05-11 21:36:31 -07:00