ff9174291e
The indication that a descriptor ring flush is required was read from FEXTNVM7 by mistake. It should be read from the PCI config space. Signed-off-by: Yanir Lubetkin <yanirx.lubetkin@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> |
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e1000 | ||
e1000e | ||
fm10k | ||
i40e | ||
i40evf | ||
igb | ||
igbvf | ||
ixgb | ||
ixgbe | ||
ixgbevf | ||
e100.c | ||
Kconfig | ||
Makefile |