Andrey Gusakov 2bd9feed23 clk: renesas: r8a779[56]x: Add MLP clocks
Add clocks for MLP modules on Renesas R-Car H3 and M3-W/N SoCs.

Signed-off-by: Andrey Gusakov <andrey.gusakov@cogentembedded.com>
Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Link: https://lore.kernel.org/r/20210929213431.5275-1-nikita.yoush@cogentembedded.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-10-15 09:46:14 +02:00
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