Andi Kleen 0d6b9d15ec x86/perf: Avoid warning for Arch LBR without XSAVE ...

[ Upstream commit 8c16dc047b5dd8f7b3bf4584fa75733ea0dde7dc ]

Some hypervisors support Arch LBR, but without the LBR XSAVE support.
The current Arch LBR init code prints a warning when the xsave size (0) is
unexpected. Avoid printing the warning for the "no LBR XSAVE" case.

Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/20211215204029.150686-1-ak@linux.intel.com
Signed-off-by: Sasha Levin <sashal@kernel.org>

2022-02-16 12:54:18 +01:00

..

amd

perf/x86/amd/ibs: Extend PERF_PMU_CAP_NO_EXCLUDE to IBS Op

2021-09-15 09:50:47 +02:00

intel

x86/perf: Avoid warning for Arch LBR without XSAVE

2022-02-16 12:54:18 +01:00

zhaoxin

x86/perf: Fix a typo

2020-07-22 10:22:08 +02:00

core.c

perf: Protect perf_guest_cbs with RCU

2022-01-20 09:17:50 +01:00

Kconfig

treewide: replace '---help---' in Kconfig files with 'help'

2020-06-14 01:57:21 +09:00

Makefile

perf/x86/rapl: Fix RAPL config variable bug

2020-06-02 11:52:56 +02:00

msr.c

perf/x86/msr: Add Sapphire Rapids CPU support

2021-10-27 09:56:55 +02:00

perf_event.h

perf/x86/amd: Don't touch the AMD64_EVENTSEL_HOSTONLY bit inside the guest

2021-08-12 13:22:19 +02:00

probe.c

perf/x86/rapl: Make perf_probe_msr() more robust and flexible

2020-05-28 07:58:55 +02:00

probe.h

perf/x86: Add MSR probe interface

2019-06-24 19:28:31 +02:00

rapl.c

perf/x86: fix sysfs type mismatches

2020-11-17 13:15:38 +01:00