iv/linux
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
linux/arch/riscv/kernel
History
Zihao Yu efa7b6e401 riscv,entry: fix misaligned base for excp_vect_table 
[ Upstream commit ac8d0b901f0033b783156ab2dc1a0e73ec42409b ]

In RV64, the size of each entry in excp_vect_table is 8 bytes. If the
base of the table is not 8-byte aligned, loading an entry in the table
will raise a misaligned exception. Although such exception will be
handled by opensbi/bbl, this still causes performance degradation.

Signed-off-by: Zihao Yu <yuzihao@ict.ac.cn>
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2021-04-16 11:43:21 +02:00
..
vdso
riscv: Disable KSAN_SANITIZE for vDSO
2021-03-04 11:38:36 +01:00
.gitignore
.gitignore: add SPDX License Identifier
2020-03-25 11:50:48 +01:00
asm-offsets.c
riscv: Cleanup unnecessary define in asm-offset.c
2020-07-30 11:37:44 -07:00
cacheinfo.c
riscv: cacheinfo: Fix using smp_processor_id() in preemptible
2021-01-27 11:55:00 +01:00
cpu_ops_sbi.c
RISC-V: Support cpu hotplug
2020-03-31 11:28:30 -07:00
cpu_ops_spinwait.c
RISC-V: Add cpu_ops and modify default booting method
2020-03-31 11:25:56 -07:00
cpu_ops.c
treewide: Convert macro and uses of __section(foo) to __section("foo")
2020-10-25 14:51:49 -07:00
cpu-hotplug.c
RISC-V: Support cpu hotplug
2020-03-31 11:28:30 -07:00
cpu.c
RISC-V: Rename and move plic_find_hart_id() to arch directory
2020-06-09 19:11:20 -07:00
cpufeature.c
RISC-V: Add bitmap reprensenting ISA features common across CPUs
2020-05-04 14:08:59 -07:00
efi-header.S
RISC-V: Add PE/COFF header for EFI stub
2020-10-02 14:31:16 -07:00
efi.c
RISC-V: Add EFI runtime services
2020-10-02 14:31:28 -07:00
entry.S
riscv,entry: fix misaligned base for excp_vect_table
2021-04-16 11:43:21 +02:00
fpu.S
riscv: abstract out CSR names for supervisor vs machine mode
2019-11-05 09:20:42 -08:00
ftrace.c
risc-v: kernel: ftrace: Fixes improper SPDX comment style
2020-11-04 13:28:20 -08:00
head.h
RISC-V: Move DT mapping outof fixmap
2020-10-02 14:30:57 -07:00
head.S
riscv: Set text_offset correctly for M-Mode
2020-11-05 17:32:27 -08:00
image-vars.h
RISC-V: Add PE/COFF header for EFI stub
2020-10-02 14:31:16 -07:00
irq.c
RISC-V: Remove do_IRQ() function
2020-06-09 19:11:24 -07:00
jump_label.c
riscv: Add jump-label implementation
2020-07-30 11:37:43 -07:00
kgdb.c
riscv: Fix "no previous prototype" compile warning in kgdb.c file
2020-07-09 20:09:30 -07:00
Makefile
RISC-V: Add EFI runtime services
2020-10-02 14:31:28 -07:00
mcount-dyn.S
riscv/ftrace: Add DYNAMIC_FTRACE_WITH_REGS support
2018-04-02 19:59:13 -07:00
mcount.S
RISC-V: remove the unused return_to_handler export
2018-10-22 17:38:12 -07:00
module-sections.c
riscv: add missing header file includes
2019-10-28 00:46:01 -07:00
module.c
riscv: Support R_RISCV_ADD64 and R_RISCV_SUB64 relocs
2020-07-30 11:37:41 -07:00
patch.c
maccess: rename probe_kernel_{read,write} to copy_{from,to}_kernel_nofault
2020-06-17 10:57:41 -07:00
perf_callchain.c
riscv: abstract out CSR names for supervisor vs machine mode
2019-11-05 09:20:42 -08:00
perf_event.c
riscv: perf_event: Make some funciton static
2020-05-11 13:48:19 -07:00
perf_regs.c
perf/arch: Remove perf_sample_data::regs_user_copy
2020-11-09 18:12:34 +01:00
process.c
sched/idle: Fix arch_cpu_idle() vs tracing
2020-11-24 16:47:35 +01:00
ptrace.c
riscv: switch to ->regset_get()
2020-07-27 14:31:10 -04:00
reset.c
riscv: cleanup the default power off implementation
2019-11-13 13:22:52 -08:00
riscv_ksyms.c
riscv: Add KASAN support
2020-01-22 13:09:58 -08:00
sbi.c
RISC-V: Add mechanism to provide custom IPI operations
2020-08-20 10:55:40 -07:00
setup.c
RISC-V: Add missing jump label initialization
2020-11-25 09:44:25 -08:00
signal.c
tracehook: clear TIF_NOTIFY_RESUME in tracehook_notify_resume()
2020-10-17 15:04:36 -06:00
smp.c
RISC-V: Remove CLINT related code from timer and arch
2020-08-20 10:58:13 -07:00
smpboot.c
RISC-V: Remove CLINT related code from timer and arch
2020-08-20 10:58:13 -07:00
soc.c
mm: introduce include/linux/pgtable.h
2020-06-09 09:39:13 -07:00
stacktrace.c
kernel: rename show_stack_loglvl() => show_stack()
2020-06-09 09:39:13 -07:00
sys_riscv.c
RISC-V: Don't allow write+exec only page mapping request in mmap
2020-06-18 17:28:53 -07:00
syscall_table.c
riscv: add missing header file includes
2019-10-28 00:46:01 -07:00
time.c
riscv: Fix kernel time_init()
2021-01-27 11:54:59 +01:00
traps_misaligned.c
riscv: Unaligned load/store handling for M_MODE
2020-04-03 10:45:33 -07:00
traps.c
RISC-V: Setup exception vector early
2020-07-30 11:37:48 -07:00
vdso.c
riscv: Fixup CONFIG_GENERIC_TIME_VSYSCALL
2021-01-19 18:27:20 +01:00
vmlinux.lds.S
RISC-V Patches for the 5.10 Merge Window, Part 1
2020-10-19 18:18:30 -07:00