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Jerome Brunet 28b3837b40 clk: meson: g12a: fix gp0 and hifi ranges 
[ Upstream commit bc794f8c56abddf709f1f84fcb2a3c9e7d9cc9b4 ]

While some SoC samples are able to lock with a PLL factor of 55, others
samples can't. ATM, a minimum of 60 appears to work on all the samples
I have tried.

Even with 60, it sometimes takes a long time for the PLL to eventually
lock. The documentation says that the minimum rate of these PLLs DCO
should be 3GHz, a factor of 125. Let's use that to be on the safe side.

With factor range changed, the PLL seems to lock quickly (enough) so far.
It is still unclear if the range was the only reason for the delay.

Fixes: 085a4ea93d54 ("clk: meson: g12a: add peripheral clock controller")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20210429090325.60970-1-jbrunet@baylibre.com
Signed-off-by: Sasha Levin <sashal@kernel.org>
2021-07-14 16:56:16 +02:00
..
axg-aoclk.c
clk: meson: axg-aoclk: migrate to the new parent description method
2019-07-29 12:42:48 +02:00
axg-aoclk.h
clk: meson: axg-ao: add 32k generation subtree
2019-01-07 15:21:43 +01:00
axg-audio.c
clk: meson: axg-audio: fix g12a tdmout sclk inverter
2020-08-17 15:58:12 +02:00
axg-audio.h
clk: meson: axg_audio: add sm1 support
2019-10-08 09:29:23 +02:00
axg.c
clk: meson: clk-regmap: migrate to new parent description method
2019-07-29 12:42:49 +02:00
axg.h
clk: meson: clk-pll: remove od parameters
2018-09-26 12:01:57 +02:00
clk-cpu-dyndiv.c
clk: meson: add g12a cpu dynamic divider driver
2019-08-09 12:10:03 +02:00
clk-cpu-dyndiv.h
clk: meson: add g12a cpu dynamic divider driver
2019-08-09 12:10:03 +02:00
clk-dualdiv.c
clk: meson: rework and clean drivers dependencies
2019-02-02 17:43:32 +01:00
clk-dualdiv.h
clk: meson: rework and clean drivers dependencies
2019-02-02 17:43:32 +01:00
clk-mpll.c
clk: let init callback return an error code
2019-12-23 18:53:13 -08:00
clk-mpll.h
clk: meson: mpll: add init callback and regs
2019-05-20 12:19:29 +02:00
clk-phase.c
clk: meson: add sclk-ws driver
2020-08-17 15:58:02 +02:00
clk-phase.h
clk: meson: add sclk-ws driver
2020-08-17 15:58:02 +02:00
clk-pll.c
clk: meson: clk-pll: propagate the error from meson_clk_pll_set_rate()
2021-03-04 11:37:52 +01:00
clk-pll.h
clk: meson-pll: add reduced specific clk_ops for G12A PCIe PLL
2019-04-01 10:45:11 +02:00
clk-regmap.c
clk: meson: rework and clean drivers dependencies
2019-02-02 17:43:32 +01:00
clk-regmap.h
clk: define to_clk_regmap() as inline function
2020-10-28 16:34:44 -07:00
g12a-aoclk.c
clk: meson: g12a-aoclk: migrate to the new parent description method
2019-07-29 12:42:48 +02:00
g12a-aoclk.h
dt-bindings: clock: g12a-aoclk: expose CLKID_AO_CTS_OSCIN
2019-04-01 10:45:11 +02:00
g12a.c
clk: meson: g12a: fix gp0 and hifi ranges
2021-07-14 16:56:16 +02:00
g12a.h
clk: meson: g12a: Add support for NNA CLK source clocks
2020-06-19 17:16:39 +02:00
gxbb-aoclk.c
clk: meson: gxbb-aoclk: migrate to the new parent description method
2019-07-29 12:42:48 +02:00
gxbb-aoclk.h
clk: meson: gxbb-ao: replace cec-32k with the dual divider
2019-01-07 15:21:22 +01:00
gxbb.c
clk: meson: gxbb: Prepare the GPU clock tree to change at runtime
2020-04-16 12:23:05 +02:00
gxbb.h
clk: meson: gxbb: add the gxl internal dac gate
2020-02-13 17:26:04 +01:00
Kconfig
clk: meson: Kconfig: fix dependency for G12A
2020-12-30 11:53:19 +01:00
Makefile
clk: meson: add a driver for the Meson8/8b/8m2 DDR clock controller
2019-12-11 14:06:29 +01:00
meson8-ddr.c
clk: meson: add a driver for the Meson8/8b/8m2 DDR clock controller
2019-12-11 14:06:29 +01:00
meson8b.c
clk: meson: meson8b: add the vclk2_en gate clock
2020-07-09 11:37:44 +02:00
meson8b.h
Merge branch 'clk-amlogic' into clk-next
2020-07-21 01:01:11 -07:00
meson-aoclk.c
clk: meson: use semicolons rather than commas to separate statements
2020-10-13 17:43:07 -07:00
meson-aoclk.h
clk: meson: remove ao input bypass clocks
2019-07-29 12:42:48 +02:00
meson-eeclk.c
clk: meson: remove ee input bypass clocks
2019-07-29 12:42:49 +02:00
meson-eeclk.h
clk: meson: remove ee input bypass clocks
2019-07-29 12:42:49 +02:00
parm.h
clk: meson: rework and clean drivers dependencies
2019-02-02 17:43:32 +01:00
sclk-div.c
clk: let init callback return an error code
2019-12-23 18:53:13 -08:00
sclk-div.h
clk: meson: rework and clean drivers dependencies
2019-02-02 17:43:32 +01:00
vid-pll-div.c
clk: meson: vid-pll-div: remove warning and return 0 on invalid config
2019-03-29 09:41:30 +01:00
vid-pll-div.h
clk: meson: rework and clean drivers dependencies
2019-02-02 17:43:32 +01:00