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Changbin Du 1851b9a467 riscv: fix oops caused by irqsoff latency tracer 
commit 22e2100b1b07d6f5acc71cc1acb53f680c677d77 upstream.

The trace_hardirqs_{on,off}() require the caller to setup frame pointer
properly. This because these two functions use macro 'CALLER_ADDR1' (aka.
__builtin_return_address(1)) to acquire caller info. If the $fp is used
for other purpose, the code generated this macro (as below) could trigger
memory access fault.

   0xffffffff8011510e <+80>:    ld      a1,-16(s0)
   0xffffffff80115112 <+84>:    ld      s2,-8(a1)  # <-- paging fault here

The oops message during booting if compiled with 'irqoff' tracer enabled:
[    0.039615][    T0] Unable to handle kernel NULL pointer dereference at virtual address 00000000000000f8
[    0.041925][    T0] Oops [#1]
[    0.042063][    T0] Modules linked in:
[    0.042864][    T0] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 5.17.0-rc1-00233-g9a20c48d1ed2 #29
[    0.043568][    T0] Hardware name: riscv-virtio,qemu (DT)
[    0.044343][    T0] epc : trace_hardirqs_on+0x56/0xe2
[    0.044601][    T0]  ra : restore_all+0x12/0x6e
[    0.044721][    T0] epc : ffffffff80126a5c ra : ffffffff80003b94 sp : ffffffff81403db0
[    0.044801][    T0]  gp : ffffffff8163acd8 tp : ffffffff81414880 t0 : 0000000000000020
[    0.044882][    T0]  t1 : 0098968000000000 t2 : 0000000000000000 s0 : ffffffff81403de0
[    0.044967][    T0]  s1 : 0000000000000000 a0 : 0000000000000001 a1 : 0000000000000100
[    0.045046][    T0]  a2 : 0000000000000000 a3 : 0000000000000000 a4 : 0000000000000000
[    0.045124][    T0]  a5 : 0000000000000000 a6 : 0000000000000000 a7 : 0000000054494d45
[    0.045210][    T0]  s2 : ffffffff80003b94 s3 : ffffffff81a8f1b0 s4 : ffffffff80e27b50
[    0.045289][    T0]  s5 : ffffffff81414880 s6 : ffffffff8160fa00 s7 : 00000000800120e8
[    0.045389][    T0]  s8 : 0000000080013100 s9 : 000000000000007f s10: 0000000000000000
[    0.045474][    T0]  s11: 0000000000000000 t3 : 7fffffffffffffff t4 : 0000000000000000
[    0.045548][    T0]  t5 : 0000000000000000 t6 : ffffffff814aa368
[    0.045620][    T0] status: 0000000200000100 badaddr: 00000000000000f8 cause: 000000000000000d
[    0.046402][    T0] [<ffffffff80003b94>] restore_all+0x12/0x6e

This because the $fp(aka. $s0) register is not used as frame pointer in the
assembly entry code.

	resume_kernel:
		REG_L s0, TASK_TI_PREEMPT_COUNT(tp)
		bnez s0, restore_all
		REG_L s0, TASK_TI_FLAGS(tp)
                andi s0, s0, _TIF_NEED_RESCHED
                beqz s0, restore_all
                call preempt_schedule_irq
                j restore_all

To fix above issue, here we add one extra level wrapper for function
trace_hardirqs_{on,off}() so they can be safely called by low level entry
code.

Signed-off-by: Changbin Du <changbin.du@gmail.com>
Fixes: 3c4697982982 ("riscv: Enable LOCKDEP_SUPPORT & fixup TRACE_IRQFLAGS_SUPPORT")
Cc: stable@vger.kernel.org
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-03-02 11:48:08 +01:00
..
probes
riscv: kprobes: implement the branch instructions
2021-07-21 23:22:34 -07:00
vdso
riscv/vdso: Move vdso data page up front
2021-10-02 13:42:25 -07:00
.gitignore
.gitignore: add SPDX License Identifier
2020-03-25 11:50:48 +01:00
asm-offsets.c
riscv: Introduce structure that group all variables regarding kernel mapping
2021-07-05 18:04:00 -07:00
cacheinfo.c
drivers: base: cacheinfo: Get rid of DEFINE_SMP_CALL_CACHE_FUNCTION()
2021-09-01 10:29:10 +02:00
cpu_ops_sbi.c
RISC-V: Support cpu hotplug
2020-03-31 11:28:30 -07:00
cpu_ops_spinwait.c
RISC-V: Add cpu_ops and modify default booting method
2020-03-31 11:25:56 -07:00
cpu_ops.c
treewide: Convert macro and uses of __section(foo) to __section("foo")
2020-10-25 14:51:49 -07:00
cpu-hotplug.c
riscv: cpu-hotplug: clear cpu from numa map when teardown
2022-02-16 12:56:18 +01:00
cpu.c
RISC-V: Rename and move plic_find_hart_id() to arch directory
2020-06-09 19:11:20 -07:00
cpufeature.c
riscv: Add __init section marker to some functions again
2021-05-29 13:39:27 -07:00
crash_dump.c
RISC-V: Add crash kernel support
2021-04-26 08:25:24 -07:00
crash_save_regs.S
RISC-V: Add kdump support
2021-04-26 08:25:23 -07:00
efi-header.S
RISC-V: Add PE/COFF header for EFI stub
2020-10-02 14:31:16 -07:00
efi.c
RISC-V: Add EFI runtime services
2020-10-02 14:31:28 -07:00
entry.S
riscv: fix oops caused by irqsoff latency tracer
2022-03-02 11:48:08 +01:00
fpu.S
riscv: abstract out CSR names for supervisor vs machine mode
2019-11-05 09:20:42 -08:00
ftrace.c
riscv: Using PATCHABLE_FUNCTION_ENTRY instead of MCOUNT
2021-01-14 15:09:05 -08:00
head.h
RISC-V: enable XIP
2021-04-26 08:31:28 -07:00
head.S
riscv: fix misalgned trap vector base address
2021-10-27 13:08:01 -07:00
image-vars.h
arch/riscv:fix typo in a comment in arch/riscv/kernel/image-vars.h
2021-02-18 23:18:00 -08:00
irq.c
RISC-V: Remove do_IRQ() function
2020-06-09 19:11:24 -07:00
jump_label.c
riscv: Add jump-label implementation
2020-07-30 11:37:43 -07:00
kexec_relocate.S
riscv: Don't use va_pa_offset on kdump
2022-01-27 11:02:50 +01:00
kgdb.c
riscv: Fix "no previous prototype" compile warning in kgdb.c file
2020-07-09 20:09:30 -07:00
machine_kexec.c
riscv: use hart id instead of cpu id on machine_kexec
2022-01-27 11:02:50 +01:00
Makefile
riscv: fix oops caused by irqsoff latency tracer
2022-03-02 11:48:08 +01:00
mcount-dyn.S
riscv: Using PATCHABLE_FUNCTION_ENTRY instead of MCOUNT
2021-01-14 15:09:05 -08:00
mcount.S
riscv: Workaround mcount name prior to clang-13
2021-04-26 08:25:01 -07:00
module-sections.c
riscv: add missing header file includes
2019-10-28 00:46:01 -07:00
module.c
riscv: module: Create module allocations without exec permissions
2021-04-26 08:25:15 -07:00
patch.c
riscv: Fixup compile error BUILD_BUG_ON failed
2021-01-14 15:09:01 -08:00
perf_callchain.c
perf: Protect perf_guest_cbs with RCU
2022-01-20 09:13:14 +01:00
perf_event.c
riscv: perf_event: Make some funciton static
2020-05-11 13:48:19 -07:00
perf_regs.c
perf/arch: Remove perf_sample_data::regs_user_copy
2020-11-09 18:12:34 +01:00
process.c
riscv: Turn has_fpu into a static key if FPU=y
2021-05-25 22:56:57 -07:00
ptrace.c
riscv: Ensure the value of FP registers in the core dump file is up to date
2021-08-24 20:54:10 -07:00
reset.c
riscv: cleanup the default power off implementation
2019-11-13 13:22:52 -08:00
riscv_ksyms.c
riscv: provide memmove implementation
2020-12-10 17:27:54 -08:00
sbi.c
RISC-V Patches for the 5.13 Merge Window, Part 1
2021-05-06 09:24:18 -07:00
setup.c
RISC-V: Use common riscv_cpuid_to_hartid_mask() for both SMP=y and SMP=n
2022-01-27 11:02:50 +01:00
signal.c
riscv: Turn has_fpu into a static key if FPU=y
2021-05-25 22:56:57 -07:00
smp.c
RISC-V: Use common riscv_cpuid_to_hartid_mask() for both SMP=y and SMP=n
2022-01-27 11:02:50 +01:00
smpboot.c
sched/core: Initialize the idle task with preemption disabled
2021-05-12 13:01:45 +02:00
soc.c
riscv: Fix builtin DTB handling
2021-01-07 19:00:50 -08:00
stacktrace.c
riscv: eliminate unreliable __builtin_frame_address(1)
2022-02-16 12:56:18 +01:00
sys_riscv.c
RISC-V: Don't allow write+exec only page mapping request in mmap
2020-06-18 17:28:53 -07:00
syscall_table.c
riscv/vdso: Refactor asm/vdso.h
2021-10-02 13:42:23 -07:00
time.c
RISC-V Patches for the 5.13 Merge Window, Part 1
2021-05-06 09:24:18 -07:00
trace_irq.c
riscv: fix oops caused by irqsoff latency tracer
2022-03-02 11:48:08 +01:00
trace_irq.h
riscv: fix oops caused by irqsoff latency tracer
2022-03-02 11:48:08 +01:00
traps_misaligned.c
riscv: Unaligned load/store handling for M_MODE
2020-04-03 10:45:33 -07:00
traps.c
trap: cleanup trap_init()
2021-09-08 11:50:27 -07:00
vdso.c
riscv/vdso: make arch_setup_additional_pages wait for mmap_sem for write killable
2021-10-02 13:42:26 -07:00
vmlinux-xip.lds.S
riscv: Move EXCEPTION_TABLE to RO_DATA segment
2021-09-10 23:59:48 -07:00
vmlinux.lds.S
riscv: Move EXCEPTION_TABLE to RO_DATA segment
2021-09-10 23:59:48 -07:00