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linux/drivers/clk/at91
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Codrin Ciubotariu 7a778371f9 clk: at91: sama7g5: fix parents of PDMCs' GCLK 
[ Upstream commit 1a944729d8635fa59638f24e8727d5ccaa0c8c19 ]

Audio PLL can be used as parent by the GCLKs of PDMCs.

Fixes: cb783bbbcf54 ("clk: at91: sama7g5: add clock support for sama7g5")
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20220304182616.1920392-1-codrin.ciubotariu@microchip.com
Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-04-08 14:23:47 +02:00
..
at91rm9200.c
clk: at91: Fix the declaration of the clocks
2021-02-09 16:54:44 -08:00
at91sam9g45.c
clk: at91: Fix the declaration of the clocks
2021-02-09 16:54:44 -08:00
at91sam9n12.c
clk: at91: Fix the declaration of the clocks
2021-02-09 16:54:44 -08:00
at91sam9rl.c
clk: at91: Fix the declaration of the clocks
2021-02-09 16:54:44 -08:00
at91sam9x5.c
clk: at91: Fix the declaration of the clocks
2021-02-09 16:54:44 -08:00
at91sam9260.c
clk: at91: Fix the declaration of the clocks
2021-02-09 16:54:44 -08:00
clk-audio-pll.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152
2019-05-30 11:26:32 -07:00
clk-generated.c
clk: at91: clk-generated: Limit the requested rate to our range
2021-08-28 22:28:24 -07:00
clk-h32mx.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152
2019-05-30 11:26:32 -07:00
clk-i2s-mux.c
clk: at91: move DT compatibility code to its own file
2018-10-17 10:45:39 -07:00
clk-main.c
clk: at91: clk-main: update key before writing AT91_CKGR_MOR
2020-10-13 19:59:01 -07:00
clk-master.c
clk: at91: clk-master: fix prescaler logic
2021-11-18 19:16:56 +01:00
clk-peripheral.c
clk: at91: remove the checking of parent_name
2020-10-13 19:59:01 -07:00
clk-pll.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152
2019-05-30 11:26:32 -07:00
clk-plldiv.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152
2019-05-30 11:26:32 -07:00
clk-programmable.c
clk: at91: clk-programmable: add mux_table option
2020-07-24 02:19:08 -07:00
clk-sam9x60-pll.c
clk: at91: sam9x60-pll: use DIV_ROUND_CLOSEST_ULL
2021-11-18 19:16:56 +01:00
clk-slow.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152
2019-05-30 11:26:32 -07:00
clk-smd.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152
2019-05-30 11:26:32 -07:00
clk-system.c
clk: at91: replace conditional operator with double logical not
2020-07-24 02:19:08 -07:00
clk-usb.c
clk: at91: usb: introduce num_parents in driver's structure
2020-02-12 15:31:47 -08:00
clk-utmi.c
clk: at91: clk-utmi: add utmi support for sama7g5
2020-07-24 02:19:08 -07:00
dt-compat.c
clk: at91: clk-master: re-factor master clock
2020-12-19 11:50:56 -08:00
Makefile
clk: at91: sama7g5: add clock support for sama7g5
2020-07-24 02:19:09 -07:00
pmc.c
clk: at91: check pmc node status before registering syscore ops
2021-11-18 19:16:51 +01:00
pmc.h
clk: at91: clk-master: re-factor master clock
2020-12-19 11:50:56 -08:00
sam9x60.c
clk: at91: sam9x60: remove atmel,osc-bypass support
2020-12-19 15:33:00 -08:00
sama5d2.c
clk: at91: Fix the declaration of the clocks
2021-02-09 16:54:44 -08:00
sama5d3.c
clk: at91: Fix the declaration of the clocks
2021-02-09 16:54:44 -08:00
sama5d4.c
clk: at91: Fix the declaration of the clocks
2021-02-09 16:54:44 -08:00
sama7g5.c
clk: at91: sama7g5: fix parents of PDMCs' GCLK
2022-04-08 14:23:47 +02:00
sckc.c
clk: at91: sckc: register slow_rc with accuracy option
2020-07-24 02:19:08 -07:00