Stephen Boyd 56e68e2cd8 clk: rockchip: Initialize hw to error to avoid undefined behavior ...

[ Upstream commit b608f11d49ec671739604cc763248d8e8fadbbeb ]

We can get down to this return value from ERR_CAST() without
initializing hw. Set it to -ENOMEM so that we always return something
sane.

Fixes the following smatch warning:

drivers/clk/rockchip/clk-half-divider.c:228 rockchip_clk_register_halfdiv() error: uninitialized symbol 'hw'.
drivers/clk/rockchip/clk-half-divider.c:228 rockchip_clk_register_halfdiv() warn: passing zero to 'ERR_CAST'

Cc: Elaine Zhang <zhangqing@rock-chips.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Fixes: 956060a52795 ("clk: rockchip: add support for half divider")
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>

2020-10-29 09:57:54 +01:00

..

clk-cpu.c

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500

2019-06-19 17:09:55 +02:00

clk-ddr.c

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157

2019-05-30 11:26:37 -07:00

clk-half-divider.c

clk: rockchip: Initialize hw to error to avoid undefined behavior

2020-10-29 09:57:54 +01:00

clk-inverter.c

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157

2019-05-30 11:26:37 -07:00

clk-mmc-phase.c

This round of clk driver and framework updates is heavy on the driver update

2019-07-17 10:07:48 -07:00

clk-muxgrf.c

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 282

2019-06-05 17:36:37 +02:00

clk-pll.c

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157

2019-05-30 11:26:37 -07:00

clk-px30.c

This round of clk driver and framework updates is heavy on the driver update

2019-07-17 10:07:48 -07:00

clk-rk3036.c

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157

2019-05-30 11:26:37 -07:00

clk-rk3128.c

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157

2019-05-30 11:26:37 -07:00

clk-rk3188.c

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157

2019-05-30 11:26:37 -07:00

clk-rk3228.c

clk: rockchip: Fix initialization of mux_pll_src_4plls_p

2020-09-23 12:40:39 +02:00

clk-rk3288.c

This round of clk driver and framework updates is heavy on the driver update

2019-07-17 10:07:48 -07:00

clk-rk3308.c

clk: rockchip: Add clock controller for the rk3308

2019-09-05 12:43:39 +02:00

clk-rk3328.c

This round of clk driver and framework updates is heavy on the driver update

2019-07-17 10:07:48 -07:00

clk-rk3368.c

This round of clk driver and framework updates is heavy on the driver update

2019-07-17 10:07:48 -07:00

clk-rk3399.c

This round of clk driver and framework updates is heavy on the driver update

2019-07-17 10:07:48 -07:00

clk-rv1108.c

clk: rockchip: Fix -Wunused-const-variable in rv1108 clk driver

2019-07-25 21:00:52 +02:00

clk.c

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157

2019-05-30 11:26:37 -07:00

clk.h

clk: rockchip: Add clock controller for the rk3308

2019-09-05 12:43:39 +02:00

Makefile

clk: rockchip: Add clock controller for the rk3308

2019-09-05 12:43:39 +02:00

softrst.c

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157

2019-05-30 11:26:37 -07:00