iv/linux
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
linux/arch/riscv/kernel
History
Yash Shah f06a6294e1 RISC-V: Don't allow write+exec only page mapping request in mmap 
[ Upstream commit e0d17c842c0f824fd4df9f4688709fc6907201e1 ]

As per the table 4.4 of version "20190608-Priv-MSU-Ratified" of the
RISC-V instruction set manual[0], the PTE permission bit combination of
"write+exec only" is reserved for future use. Hence, don't allow such
mapping request in mmap call.

An issue is been reported by David Abdurachmanov, that while running
stress-ng with "sysbadaddr" argument, RCU stalls are observed on RISC-V
specific kernel.

This issue arises when the stress-sysbadaddr request for pages with
"write+exec only" permission bits and then passes the address obtain
from this mmap call to various system call. For the riscv kernel, the
mmap call should fail for this particular combination of permission bits
since it's not valid.

[0]: http://dabbelt.com/~palmer/keep/riscv-isa-manual/riscv-privileged-20190608-1.pdf

Signed-off-by: Yash Shah <yash.shah@sifive.com>
Reported-by: David Abdurachmanov <david.abdurachmanov@gmail.com>
[Palmer: Refer to the latest ISA specification at the only link I could
find, and update the terminology.]
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-06-30 15:37:06 -04:00
..
vdso
riscv: fix vdso build with lld
2020-05-20 08:20:13 +02:00
.gitignore
RISC-V: Build Infrastructure
2017-09-26 15:26:49 -07:00
asm-offsets.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286
2019-06-05 17:36:37 +02:00
cacheinfo.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286
2019-06-05 17:36:37 +02:00
cpu.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286
2019-06-05 17:36:37 +02:00
cpufeature.c
riscv: add missing header file includes
2019-10-28 00:46:01 -07:00
entry.S
RISC-V: entry: Remove unneeded need_resched() loop
2019-10-09 16:48:27 -07:00
fpu.S
riscv: Using CSR numbers to access CSRs
2019-08-30 11:04:19 -07:00
ftrace.c
riscv: ftrace: correct the condition logic in function graph tracer
2020-01-09 10:19:59 +01:00
head.h
riscv: add prototypes for assembly language functions from head.S
2019-10-28 00:46:00 -07:00
head.S
arch/riscv: disable excess harts before picking main boot hart
2019-09-20 08:36:36 -07:00
irq.c
riscv: for C functions called only from assembly, mark with __visible
2019-10-28 00:46:02 -07:00
Makefile
riscv: Add support for perf registers sampling
2019-09-05 00:48:58 -07:00
mcount-dyn.S
riscv/ftrace: Add DYNAMIC_FTRACE_WITH_REGS support
2018-04-02 19:59:13 -07:00
mcount.S
RISC-V: remove the unused return_to_handler export
2018-10-22 17:38:12 -07:00
module-sections.c
riscv: add missing header file includes
2019-10-28 00:46:01 -07:00
module.c
riscv: avoid the PIC offset of static percpu data in module beyond 2G limits
2020-03-25 08:25:48 +01:00
module.lds
RISC-V: Add section of GOT.PLT for kernel module
2018-04-02 20:00:54 -07:00
perf_callchain.c
riscv: Add perf callchain support
2019-09-04 12:43:00 -07:00
perf_event.c
RISC-V: Access CSRs using CSR numbers
2019-05-16 20:42:11 -07:00
perf_regs.c
riscv: Add support for perf registers sampling
2019-09-05 00:48:58 -07:00
process.c
riscv: Implement copy_thread_tls
2020-01-14 20:08:34 +01:00
ptrace.c
riscv: for C functions called only from assembly, mark with __visible
2019-10-28 00:46:02 -07:00
reset.c
riscv: add missing header file includes
2019-10-28 00:46:01 -07:00
riscv_ksyms.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500
2019-06-19 17:09:55 +02:00
setup.c
riscv: add prototypes for assembly language functions from head.S
2019-10-28 00:46:00 -07:00
signal.c
riscv: for C functions called only from assembly, mark with __visible
2019-10-28 00:46:02 -07:00
smp.c
riscv: add missing header file includes
2019-10-28 00:46:01 -07:00
smpboot.c
riscv: for C functions called only from assembly, mark with __visible
2019-10-28 00:46:02 -07:00
stacktrace.c
riscv: stacktrace: Fix undefined reference to `walk_stackframe'
2020-06-03 08:21:13 +02:00
sys_riscv.c
RISC-V: Don't allow write+exec only page mapping request in mmap
2020-06-30 15:37:06 -04:00
syscall_table.c
riscv: add missing header file includes
2019-10-28 00:46:01 -07:00
time.c
riscv: add missing header file includes
2019-10-28 00:46:01 -07:00
traps.c
riscv: for C functions called only from assembly, mark with __visible
2019-10-28 00:46:02 -07:00
vdso.c
riscv: add missing header file includes
2019-10-28 00:46:01 -07:00
vmlinux.lds.S
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286
2019-06-05 17:36:37 +02:00