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Hauke Mehrtens 626e2200f8 mtd: spinand: gigadevice: Add QE Bit

[ Upstream commit aea7687e77bebce5b67fab9d03347bd8df7933c7 ]

The following GigaDevice chips have the QE BIT in the feature flags, I
checked the datasheets, but did not try this.
* GD5F1GQ4xExxG
* GD5F1GQ4xFxxG
* GD5F1GQ4UAYIG
* GD5F4GQ4UAYIG

The Quad operations like 0xEB mention that the QE bit has to be set.

Fixes: c93c613214ac ("mtd: spinand: add support for GigaDevice GD5FxGQ4xA")
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Tested-by: Chuanhong Guo <gch981213@gmail.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200820165121.3192-3-hauke@hauke-m.de
Signed-off-by: Sasha Levin <sashal@kernel.org>

2020-10-29 09:57:51 +01:00

onenand

mtd: onenand_base: Adjust indentation in onenand_read_ops_nolock

2020-02-14 16:34:18 -05:00

raw

mtd: rawnand: vf610: disable clk on error handling path in probe

2020-10-29 09:57:50 +01:00

spi

mtd: spinand: gigadevice: Add QE Bit

2020-10-29 09:57:51 +01:00

bbt.c

mtd: nand: Fix memory allocation in nanddev_bbt_init()