linux

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Linus Torvalds 948752d2e0 RISC-V Fixes for 6.11-rc2

* A fix to avoid dropping some of the internal pseudo-extensions, which
   breaks *envcfg dependency parsing.
 * The kernel entry address is now aligned in purgatory, which avoids a
   misaligned load that can lead to crash on systems that don't support
   misaligned accesses early in boot.
 * The FW_SFENCE_VMA_RECEIVED perf event was duplicated in a handful of
   perf JSON configurations, one of them been updated to
   FW_SFENCE_VMA_ASID_SENT.
 * The starfive cache driver is now restricted to 64-bit systems, as it
   isn't 32-bit clean.
 * A fix for to avoid aliasing legacy-mode perf counters with software
   perf counters.
 * VM_FAULT_SIGSEGV is now handled in the page fault code.
 * A fix for stalls during CPU hotplug due to IPIs being disabled.
 * A fix for memblock bounds checking.  This manifests as a crash on
   systems with discontinuous memory maps that have regions that don't
   fit in the linear map.
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Merge tag 'riscv-for-linus-6.11-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux

Pull RISC-V fixes from Palmer Dabbelt:

 - A fix to avoid dropping some of the internal pseudo-extensions, which
   breaks *envcfg dependency parsing

 - The kernel entry address is now aligned in purgatory, which avoids a
   misaligned load that can lead to crash on systems that don't support
   misaligned accesses early in boot

 - The FW_SFENCE_VMA_RECEIVED perf event was duplicated in a handful of
   perf JSON configurations, one of them been updated to
   FW_SFENCE_VMA_ASID_SENT

 - The starfive cache driver is now restricted to 64-bit systems, as it
   isn't 32-bit clean

 - A fix for to avoid aliasing legacy-mode perf counters with software
   perf counters

 - VM_FAULT_SIGSEGV is now handled in the page fault code

 - A fix for stalls during CPU hotplug due to IPIs being disabled

 - A fix for memblock bounds checking. This manifests as a crash on
   systems with discontinuous memory maps that have regions that don't
   fit in the linear map

* tag 'riscv-for-linus-6.11-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
  riscv: Fix linear mapping checks for non-contiguous memory regions
  RISC-V: Enable the IPI before workqueue_online_cpu()
  riscv/mm: Add handling for VM_FAULT_SIGSEGV in mm_fault_error()
  perf: riscv: Fix selecting counters in legacy mode
  cache: StarFive: Require a 64-bit system
  perf arch events: Fix duplicate RISC-V SBI firmware event name
  riscv/purgatory: align riscv_kernel_entry
  riscv: cpufeature: Do not drop Linux-internal extensions

2024-08-02 09:33:35 -07:00

boot

RISC-V Patches for the 6.11 Merge Window, Part 2

2024-07-27 10:14:34 -07:00

configs

RISC-V: run savedefconfig for defconfig

2024-07-22 10:57:47 -07:00

crypto

crypto: riscv - add vector crypto accelerated AES-CBC-CTS

2024-03-20 08:56:11 -07:00

errata

riscv: Extend cpufeature.c to detect vendor extensions