Fang Xiang 3fca09b62a irqchip/gic-v3-its: Flush ITS tables correctly in non-coherent GIC designs
[ Upstream commit d3badb15613c14dd35d3495b1dde5c90fcd616dd ]

In non-coherent GIC designs, the ITS tables must be flushed before writing
to the GITS_BASER<n> registers, otherwise the ITS could read dirty tables,
which results in unpredictable behavior.

Flush the tables right at the begin of its_setup_baser() to prevent that.

[ tglx: Massage changelog ]

Fixes: a8707f553884 ("irqchip/gic-v3: Add Rockchip 3588001 erratum workaround")
Suggested-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Fang Xiang <fangxiang3@xiaomi.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20231030083256.4345-1-fangxiang3@xiaomi.com
Signed-off-by: Sasha Levin <sashal@kernel.org>
2023-12-03 07:33:02 +01:00
..
2023-02-25 11:30:21 -08:00
2023-08-28 11:33:03 +02:00
2023-06-17 07:21:02 +01:00
2022-03-23 17:35:57 -07:00
2023-01-12 10:53:12 +01:00