902a4aab0e
[ Upstream commit 6c314425b9ef6b247cefd0903e287eb072580c3b ]
Turns out this "SoC" side controller does not support certain commands,
such as reading chip JEDEC ID, so the controller is pretty much unusable
in Linux. We should be using the "PCH" side controller instead. For this
reason remove this PCI ID from the list.
Fixes: c2912d42e86e ("spi: intel-pci: Add support for Meteor Lake-S SPI serial flash")
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Link: https://msgid.link/r/20240122120034.2664812-2-mika.westerberg@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
102 lines
3.1 KiB
C
102 lines
3.1 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Intel PCH/PCU SPI flash PCI driver.
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*
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* Copyright (C) 2016 - 2022, Intel Corporation
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* Author: Mika Westerberg <mika.westerberg@linux.intel.com>
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*/
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#include <linux/module.h>
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#include <linux/pci.h>
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#include "spi-intel.h"
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#define BCR 0xdc
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#define BCR_WPD BIT(0)
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static bool intel_spi_pci_set_writeable(void __iomem *base, void *data)
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{
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struct pci_dev *pdev = data;
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u32 bcr;
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/* Try to make the chip read/write */
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pci_read_config_dword(pdev, BCR, &bcr);
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if (!(bcr & BCR_WPD)) {
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bcr |= BCR_WPD;
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pci_write_config_dword(pdev, BCR, bcr);
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pci_read_config_dword(pdev, BCR, &bcr);
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}
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return bcr & BCR_WPD;
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}
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static const struct intel_spi_boardinfo bxt_info = {
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.type = INTEL_SPI_BXT,
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.set_writeable = intel_spi_pci_set_writeable,
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};
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static const struct intel_spi_boardinfo cnl_info = {
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.type = INTEL_SPI_CNL,
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.set_writeable = intel_spi_pci_set_writeable,
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};
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static int intel_spi_pci_probe(struct pci_dev *pdev,
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const struct pci_device_id *id)
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{
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struct intel_spi_boardinfo *info;
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int ret;
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ret = pcim_enable_device(pdev);
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if (ret)
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return ret;
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info = devm_kmemdup(&pdev->dev, (void *)id->driver_data, sizeof(*info),
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GFP_KERNEL);
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if (!info)
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return -ENOMEM;
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info->data = pdev;
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return intel_spi_probe(&pdev->dev, &pdev->resource[0], info);
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}
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static const struct pci_device_id intel_spi_pci_ids[] = {
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{ PCI_VDEVICE(INTEL, 0x02a4), (unsigned long)&cnl_info },
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{ PCI_VDEVICE(INTEL, 0x06a4), (unsigned long)&cnl_info },
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{ PCI_VDEVICE(INTEL, 0x18e0), (unsigned long)&bxt_info },
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{ PCI_VDEVICE(INTEL, 0x19e0), (unsigned long)&bxt_info },
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{ PCI_VDEVICE(INTEL, 0x1bca), (unsigned long)&bxt_info },
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{ PCI_VDEVICE(INTEL, 0x34a4), (unsigned long)&cnl_info },
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{ PCI_VDEVICE(INTEL, 0x38a4), (unsigned long)&bxt_info },
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{ PCI_VDEVICE(INTEL, 0x43a4), (unsigned long)&cnl_info },
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{ PCI_VDEVICE(INTEL, 0x4b24), (unsigned long)&bxt_info },
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{ PCI_VDEVICE(INTEL, 0x4da4), (unsigned long)&bxt_info },
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{ PCI_VDEVICE(INTEL, 0x51a4), (unsigned long)&cnl_info },
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{ PCI_VDEVICE(INTEL, 0x54a4), (unsigned long)&cnl_info },
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{ PCI_VDEVICE(INTEL, 0x5794), (unsigned long)&cnl_info },
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{ PCI_VDEVICE(INTEL, 0x7a24), (unsigned long)&cnl_info },
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{ PCI_VDEVICE(INTEL, 0x7aa4), (unsigned long)&cnl_info },
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{ PCI_VDEVICE(INTEL, 0x7e23), (unsigned long)&cnl_info },
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{ PCI_VDEVICE(INTEL, 0x9d24), (unsigned long)&cnl_info },
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{ PCI_VDEVICE(INTEL, 0x9da4), (unsigned long)&cnl_info },
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{ PCI_VDEVICE(INTEL, 0xa0a4), (unsigned long)&cnl_info },
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{ PCI_VDEVICE(INTEL, 0xa1a4), (unsigned long)&bxt_info },
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{ PCI_VDEVICE(INTEL, 0xa224), (unsigned long)&bxt_info },
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{ PCI_VDEVICE(INTEL, 0xa2a4), (unsigned long)&cnl_info },
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{ PCI_VDEVICE(INTEL, 0xa324), (unsigned long)&cnl_info },
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{ PCI_VDEVICE(INTEL, 0xa3a4), (unsigned long)&cnl_info },
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{ },
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};
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MODULE_DEVICE_TABLE(pci, intel_spi_pci_ids);
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static struct pci_driver intel_spi_pci_driver = {
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.name = "intel-spi",
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.id_table = intel_spi_pci_ids,
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.probe = intel_spi_pci_probe,
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};
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module_pci_driver(intel_spi_pci_driver);
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MODULE_DESCRIPTION("Intel PCH/PCU SPI flash PCI driver");
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MODULE_AUTHOR("Mika Westerberg <mika.westerberg@linux.intel.com>");
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MODULE_LICENSE("GPL v2");
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