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Commit Graph

5 Commits

Author SHA1 Message Date
Tim Wiederhake
24b95e07d2 cpu_map: Add missing x86 feature "sgx"
Signed-off-by: Tim Wiederhake <twiederh@redhat.com>
Reviewed-by: Jiri Denemark <jdenemar@redhat.com>
2022-11-08 21:44:40 +01:00
Cole Robinson
812edc95a3 conf: cpu: Add <signature family=X model=X stepping=X/>
Internally we already collect x86 host family + model + stepping
numeric values. This exposed them in capabilities CPU output.
Example:

$ sudo virsh capabilities | grep -A1 -B1 signature
      <microcode version='240'/>
      <signature family='6' model='94' stepping='3'/>
      <counter name='tsc' frequency='3408010000' scaling='no'/>

Users need to know these values to calculate an expected.
SEV-ES/SEV-SNP launch measurement.

Reviewed-by: Jiri Denemark <jdenemar@redhat.com>
Signed-off-by: Cole Robinson <crobinso@redhat.com>
2022-06-16 12:12:45 -04:00
Jiri Denemark
12eb0c9496 cpu_map: Add pschange-mc-no bit in IA32_ARCH_CAPABILITIES MSR
Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Pavel Hrdina <phrdina@redhat.com>
2020-05-25 19:20:21 +02:00
Christian Ehrhardt
dd17a4eba8 cpu_map: Add more -noTSX x86 CPU models
One of the mitigation methods for TAA[1] is to disable TSX
support on the host system.  Linux added a mechanism to disable
TSX globally through the kernel command line, and many Linux
distributions now default to tsx=off.  This makes existing CPU
models that have HLE and RTM enabled not usable anymore.

Add new versions of all CPU models that have the HLE and RTM
features enabled, that can be used when TSX is disabled in the
host system.

On systems disabling the features without those types defined
in cpu-maps users end up without modern CPU types in the list
of usable CPUs to use in the likes of virsh domcapabilities
or tools higher in the stack like virt-manager.

This adds:
-Cascadelake-Server-noTSX
-Icelake-Client-noTSX
-Icelake-Server-noTSX
-Skylake-Server-noTSX-IBRS
-Skylake-Client-noTSX-IBRS

Introduced in QEMU by commit v4.2.0-rc2-3-g9ab2237f19 (function)
                  and commit v4.2.0-rc2-4-g02fa60d101 (names)

References:

    [1] TAA, TSX asynchronous Abort:
        https://software.intel.com/security-software-guidance/insights/deep-dive-intel-transactional-synchronization-extensions-intel-tsx-asynchronous-abort
        https://www.kernel.org/doc/html/latest/admin-guide/hw-vuln/tsx_async_abort.html

Fixes: https://bugs.launchpad.net/ubuntu/+source/libvirt/+bug/1853200

Signed-off-by: Christian Ehrhardt <christian.ehrhardt@canonical.com>
Message-Id: <20200310104806.2723-2-christian.ehrhardt@canonical.com>
Reviewed-by: Jiri Denemark <jdenemar@redhat.com>
2020-03-25 22:27:39 +01:00
Jiri Denemark
62a50628ff cputest: Add data for Intel(R) Core(TM) i7-8550U CPU without TSX
Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Christian Ehrhardt <christian.ehrhardt@canonical.com>
2020-03-09 16:17:34 +01:00