3 Commits

Author	SHA1	Message	Date
Ani Sinha	1d17f881a2	cpu: add CLZERO CPUID support for AMD platforms ... Qemu commit e900135dcfb67 ("i386: Add CPUID bit for CLZERO and XSAVEERPTR") adds support for CLZERO CPUID bit. This commit extends support for this CPUID bit into libvirt. Signed-off-by: Ani Sinha <ani.sinha@nutanix.com> Message-Id: <1575371352-99055-1-git-send-email-ani.sinha@nutanix.com> Reviewed-by: Jiri Denemark <jdenemar@redhat.com>	2019-12-16 13:04:14 +01:00
Jiri Denemark	6d4a3cd427	cpu: Add EPYC-IBPB CPU model ... This is a variant of EPYC with indirect branch prediction protection. The only difference between EPYC and EPYC-IBPB is the added "ibpb" feature. Signed-off-by: Jiri Denemark <jdenemar@redhat.com> Reviewed-by: Pavel Hrdina <phrdina@redhat.com>	2018-01-18 15:04:18 +01:00
Jiri Denemark	32e348be6b	cputest: Add data for updated AMD EPYC 7601 32-Core Processor ... The CPU contains the updated microcode for CVE-2017-5715. Signed-off-by: Jiri Denemark <jdenemar@redhat.com> Reviewed-by: Pavel Hrdina <phrdina@redhat.com>	2018-01-17 17:07:02 +01:00