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e808357528
So far, we are doing compile time decisions on which architecture is used. However, for testing purposes it's much easier if we pass host architecture as parameter and then let the function decide which code snippet for extracting host CPU info will be used. Signed-off-by: Michal Privoznik <mprivozn@redhat.com>
53 lines
1.5 KiB
Plaintext
53 lines
1.5 KiB
Plaintext
processor : 0
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vendor_id : GenuineIntel
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cpu family : 6
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model : 23
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model name : Intel(R) Core(TM)2 Duo CPU T9600 @ 2.80GHz
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stepping : 10
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microcode : 0xa0b
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cpu MHz : 800.000
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cache size : 6144 KB
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physical id : 0
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siblings : 2
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core id : 0
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cpu cores : 2
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apicid : 0
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initial apicid : 0
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fpu : yes
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fpu_exception : yes
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cpuid level : 13
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wp : yes
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flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx lm constant_tsc arch_perfmon pebs bts nopl aperfmperf pni dtes64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm sse4_1 xsave lahf_lm ida dts tpr_shadow vnmi flexpriority
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bogomips : 5586.29
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clflush size : 64
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cache_alignment : 64
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address sizes : 36 bits physical, 48 bits virtual
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power management:
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processor : 1
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vendor_id : GenuineIntel
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cpu family : 6
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model : 23
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model name : Intel(R) Core(TM)2 Duo CPU T9600 @ 2.80GHz
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stepping : 10
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microcode : 0xa0b
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cpu MHz : 800.000
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cache size : 6144 KB
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physical id : 0
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siblings : 2
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core id : 1
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cpu cores : 2
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apicid : 1
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initial apicid : 1
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fpu : yes
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fpu_exception : yes
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cpuid level : 13
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wp : yes
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flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx lm constant_tsc arch_perfmon pebs bts nopl aperfmperf pni dtes64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm sse4_1 xsave lahf_lm ida dts tpr_shadow vnmi flexpriority
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bogomips : 5586.29
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clflush size : 64
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cache_alignment : 64
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address sizes : 36 bits physical, 48 bits virtual
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power management:
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