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e808357528
So far, we are doing compile time decisions on which architecture is used. However, for testing purposes it's much easier if we pass host architecture as parameter and then let the function decide which code snippet for extracting host CPU info will be used. Signed-off-by: Michal Privoznik <mprivozn@redhat.com>
46 lines
1.2 KiB
Plaintext
46 lines
1.2 KiB
Plaintext
processor : 0
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vendor_id : GenuineIntel
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cpu family : 15
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model : 4
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model name : Intel(R) Xeon(TM) CPU 2.80GHz
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stepping : 8
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cpu MHz : 2800.000
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cache size : 2048 KB
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physical id : 0
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siblings : 2
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core id : 0
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cpu cores : 2
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fpu : yes
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fpu_exception : yes
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cpuid level : 5
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wp : yes
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flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm syscall nx lm constant_tsc pni monitor ds_cpl est cid cx16 xtpr lahf_lm
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bogomips : 5590.67
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clflush size : 64
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cache_alignment : 128
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address sizes : 36 bits physical, 48 bits virtual
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power management:
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processor : 1
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vendor_id : GenuineIntel
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cpu family : 15
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model : 4
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model name : Intel(R) Xeon(TM) CPU 2.80GHz
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stepping : 8
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cpu MHz : 2800.000
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cache size : 2048 KB
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physical id : 0
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siblings : 2
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core id : 1
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cpu cores : 2
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fpu : yes
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fpu_exception : yes
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cpuid level : 5
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wp : yes
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flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm syscall nx lm constant_tsc pni monitor ds_cpl est cid cx16 xtpr lahf_lm
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bogomips : 5586.49
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clflush size : 64
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cache_alignment : 128
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address sizes : 36 bits physical, 48 bits virtual
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power management:
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