2008-05-09 13:39:00 +04:00
QEMU Maintainers
================
2010-09-09 23:51:31 +04:00
The intention of this file is not to establish who owns what portions of the
code base, but to provide a set of names that developers can consult when they
have a question about a particular subset and also to provide a set of names
to be CC'd when submitting a patch to obtain appropriate review.
2008-06-04 18:57:43 +04:00
2010-09-09 23:51:31 +04:00
In general, if you have a question about inclusion of a patch, you should
consult qemu-devel and not any specific individual privately.
2008-05-09 13:39:00 +04:00
2010-09-09 23:51:31 +04:00
Descriptions of section entries:
M: Mail patches to: FullName <address@domain>
2018-10-26 13:57:11 +03:00
Maintainers are looking after a certain area and must be CCed on
patches. They are considered the main contact point.
2014-06-02 20:06:37 +04:00
R: Designated reviewer: FullName <address@domain>
These reviewers should be CCed on patches.
2018-10-26 13:57:11 +03:00
Reviewers are familiar with the subject matter and provide feedback
even though they are not maintainers.
2010-09-09 23:51:31 +04:00
L: Mailing list that is relevant to this area
2018-10-26 13:57:11 +03:00
These lists should be CCed on patches.
2010-09-09 23:51:31 +04:00
W: Web-page with status/info
Q: Patchwork web based patch tracking system site
T: SCM tree type and location. Type is one of: git, hg, quilt, stgit.
2022-11-17 20:25:23 +03:00
S: Status, one of the following (keep in sync with docs/devel/maintainers.rst):
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Supported: Someone is actually paid to look after this.
Maintained: Someone actually looks after it.
Odd Fixes: It has a maintainer but they don't have time to do
2011-11-09 23:45:38 +04:00
much other than throw the odd patch in. See below.
2010-09-09 23:51:31 +04:00
Orphan: No current maintainer [but maybe you could take the
role as you write your new code].
Obsolete: Old code. Something tagged obsolete generally means
it has been replaced by a better system and you
should be using that.
F: Files and directories with wildcard patterns.
A trailing slash includes all files and subdirectory files.
F: drivers/net/ all files in and below drivers/net
F: drivers/net/* all files in drivers/net, but not below
F: */net/* all files in "any top level directory"/net
One pattern per line. Multiple F: lines acceptable.
X: Files and directories that are NOT maintained, same rules as F:
Files exclusions are tested before file matches.
Can be useful for excluding a specific subdirectory, for instance:
F: net/
X: net/ipv6/
matches all files in and below net excluding net/ipv6/
K: Keyword perl extended regex pattern to match content in a
patch or file. For instance:
K: of_get_profile
matches patches or files that contain "of_get_profile"
K: \b(printk|pr_(info|err))\b
matches patches or files that contain one or more of the words
printk, pr_info or pr_err
One regex pattern per line. Multiple K: lines acceptable.
General Project Administration
------------------------------
2014-10-16 00:30:52 +04:00
M: Peter Maydell <peter.maydell@linaro.org>
2010-09-09 23:51:31 +04:00
2016-02-09 06:04:25 +03:00
All patches CC here
L: qemu-devel@nongnu.org
F: *
F: */
2023-04-03 16:49:13 +03:00
Project policy and developer guides
R: Alex Bennée <alex.bennee@linaro.org>
R: Daniel P. Berrangé <berrange@redhat.com>
R: Thomas Huth <thuth@redhat.com>
R: Markus Armbruster <armbru@redhat.com>
R: Philippe Mathieu-Daudé <philmd@linaro.org>
W: https://www.qemu.org/docs/master/devel/index.html
S: Odd Fixes
F: docs/devel/style.rst
F: docs/devel/code-of-conduct.rst
F: docs/devel/conflict-resolution.rst
F: docs/devel/submitting-a-patch.rst
F: docs/devel/submitting-a-pull-request.rst
2014-04-17 17:45:46 +04:00
Responsible Disclosure, Reporting Security Issues
2019-06-06 20:24:08 +03:00
-------------------------------------------------
2017-11-21 15:04:35 +03:00
W: https://wiki.qemu.org/SecurityProcess
2014-04-17 17:45:46 +04:00
M: Michael S. Tsirkin <mst@redhat.com>
L: secalert@redhat.com
2016-10-08 13:00:07 +03:00
Trivial patches
---------------
Trivial patches
M: Michael Tokarev <mjt@tls.msk.ru>
M: Laurent Vivier <laurent@vivier.eu>
S: Maintained
L: qemu-trivial@nongnu.org
K: ^Subject:.*(?i)trivial
2022-12-12 20:48:41 +03:00
F: docs/devel/trivial-patches.rst
2016-10-08 13:00:07 +03:00
T: git git://git.corpit.ru/qemu.git trivial-patches
2018-11-08 14:15:26 +03:00
T: git https://github.com/vivier/qemu.git trivial-patches
2016-10-08 13:00:07 +03:00
2018-01-15 17:43:11 +03:00
Architecture support
--------------------
2019-06-06 20:24:07 +03:00
S390 general architecture support
2020-05-25 18:58:55 +03:00
M: Thomas Huth <thuth@redhat.com>
2018-01-15 17:43:11 +03:00
S: Supported
2021-07-07 16:17:43 +03:00
F: configs/devices/s390x-softmmu/default.mak
2018-01-15 17:43:11 +03:00
F: gdb-xml/s390*.xml
F: hw/char/sclp*.[hc]
F: hw/char/terminal3270.c
F: hw/intc/s390_flic.c
F: hw/intc/s390_flic_kvm.c
F: hw/s390x/
2018-10-10 20:03:07 +03:00
F: hw/vfio/ap.c
2018-01-15 17:43:11 +03:00
F: hw/vfio/ccw.c
F: hw/watchdog/wdt_diag288.c
F: include/hw/s390x/
F: include/hw/watchdog/wdt_diag288.h
F: pc-bios/s390-ccw/
F: pc-bios/s390-ccw.img
F: target/s390x/
2020-03-18 13:39:40 +03:00
F: docs/system/target-s390x.rst
F: docs/system/s390x/
2019-05-29 12:05:12 +03:00
F: tests/migration/s390x/
2018-01-15 17:43:11 +03:00
K: ^Subject:.*(?i)s390x?
L: qemu-s390x@nongnu.org
2021-10-04 11:31:57 +03:00
MIPS general architecture support
2022-10-17 21:20:05 +03:00
M: Philippe Mathieu-Daudé <philmd@linaro.org>
2021-10-04 11:31:57 +03:00
R: Jiaxun Yang <jiaxun.yang@flygoat.com>
S: Odd Fixes
K: ^Subject:.*(?i)mips
2022-12-12 20:12:52 +03:00
F: docs/system/target-mips.rst
F: configs/targets/mips*
2021-10-04 11:31:57 +03:00
2023-09-29 16:45:51 +03:00
X86 general architecture support
M: Paolo Bonzini <pbonzini@redhat.com>
S: Maintained
F: configs/devices/i386-softmmu/default.mak
F: configs/targets/i386-softmmu.mak
F: configs/targets/x86_64-softmmu.mak
F: docs/system/target-i386*
F: target/i386/*.[ch]
F: target/i386/Kconfig
F: target/i386/meson.build
2024-05-22 18:34:51 +03:00
F: tools/i386/
2023-09-29 16:45:51 +03:00
2019-06-06 20:24:08 +03:00
Guest CPU cores (TCG)
---------------------
2019-06-06 20:24:07 +03:00
Overall TCG CPUs
2020-11-13 07:35:43 +03:00
M: Richard Henderson <richard.henderson@linaro.org>
2018-10-19 15:25:42 +03:00
R: Paolo Bonzini <pbonzini@redhat.com>
2015-11-13 20:49:54 +03:00
S: Maintained
2023-10-04 12:06:28 +03:00
F: system/cpus.c
F: system/watchpoint.c
2023-09-14 21:57:12 +03:00
F: cpu-common.c
F: cpu-target.c
2023-09-14 21:57:13 +03:00
F: page-vary-target.c
exec: Build page-vary-common.c with -fno-lto
In bbc17caf81f, we used an alias attribute to allow target_page
to be declared const, and yet be initialized late.
This fails when using LTO with several versions of gcc.
The compiler looks through the alias and decides that the const
variable is statically initialized to zero, then propagates that
zero to many uses of the variable.
This can be avoided by compiling one object file with -fno-lto.
In this way, any initializer cannot be seen, and the constant
propagation does not occur.
Since we are certain to have this separate compilation unit, we
can drop the alias attribute as well. We simply have differing
declarations for target_page in different compilation units.
Drop the use of init_target_page, and drop the configure detection
for CONFIG_ATTRIBUTE_ALIAS.
In order to change the compilation flags for a file with meson,
we must use a static_library. This runs into specific_ss, where
we would need to create many static_library instances.
Fix this by splitting page-vary.c: the page-vary-common.c part is
compiled once as a static_library, while the page-vary.c part is
left in specific_ss in order to handle the target-specific value
of TARGET_PAGE_BITS_MIN.
Reported-by: Gavin Shan <gshan@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210321211534.2101231-1-richard.henderson@linaro.org>
[PMD: Fix typo in subject, split original patch in 3]
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Gavin Shan <gshan@redhat.com>
Message-Id: <20210322112427.4045204-4-f4bug@amsat.org>
[rth: Update MAINTAINERS]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-03-22 14:24:26 +03:00
F: page-vary-common.c
2017-06-29 18:03:04 +03:00
F: accel/tcg/
2018-11-22 15:57:18 +03:00
F: accel/stubs/tcg-stub.c
2020-12-14 17:02:33 +03:00
F: util/cacheinfo.c
F: util/cacheflush.c
2018-11-11 00:13:12 +03:00
F: scripts/decodetree.py
2019-02-24 00:00:10 +03:00
F: docs/devel/decodetree.rst
2022-12-12 20:48:41 +03:00
F: docs/devel/tcg*
2015-11-13 20:49:54 +03:00
F: include/exec/cpu*.h
F: include/exec/exec-all.h
2023-03-03 05:57:43 +03:00
F: include/exec/tb-flush.h
2023-03-03 05:58:00 +03:00
F: include/exec/target_long.h
2014-10-22 02:18:01 +04:00
F: include/exec/helper*.h
2023-04-01 05:07:00 +03:00
F: include/exec/helper*.h.inc
2023-03-31 20:37:04 +03:00
F: include/exec/helper-info.c.inc
2023-12-06 22:27:32 +03:00
F: include/exec/page-protection.h
2016-09-10 00:15:04 +03:00
F: include/sysemu/cpus.h
2019-05-23 17:35:05 +03:00
F: include/sysemu/tcg.h
2021-02-04 19:39:23 +03:00
F: include/hw/core/tcg-cpu-ops.h
2023-05-18 07:12:08 +03:00
F: host/include/*/host/cpuinfo.h
F: util/cpuinfo-*.c
2023-03-28 04:02:33 +03:00
F: include/tcg/
2023-10-13 09:57:39 +03:00
F: tests/decode/
2014-10-22 02:18:01 +04:00
2016-02-19 19:25:01 +03:00
FPU emulation
M: Aurelien Jarno <aurelien@aurel32.net>
M: Peter Maydell <peter.maydell@linaro.org>
2018-12-05 15:48:12 +03:00
M: Alex Bennée <alex.bennee@linaro.org>
S: Maintained
2016-02-19 19:25:01 +03:00
F: fpu/
F: include/fpu/
2018-12-05 15:48:12 +03:00
F: tests/fp/
2016-02-19 19:25:01 +03:00
2019-06-06 20:24:07 +03:00
Alpha TCG CPUs
2020-11-13 07:35:43 +03:00
M: Richard Henderson <richard.henderson@linaro.org>
2011-05-20 23:23:18 +04:00
S: Maintained
2016-10-11 09:56:52 +03:00
F: target/alpha/
2014-10-22 02:31:28 +04:00
F: tests/tcg/alpha/
2015-09-22 12:36:16 +03:00
F: disas/alpha.c
2008-05-09 13:39:00 +04:00
2019-06-06 20:24:07 +03:00
ARM TCG CPUs
2011-09-20 19:18:46 +04:00
M: Peter Maydell <peter.maydell@linaro.org>
2015-11-03 16:49:42 +03:00
L: qemu-arm@nongnu.org
2010-09-09 23:51:31 +04:00
S: Maintained
2016-10-11 09:56:52 +03:00
F: target/arm/
2023-02-17 23:11:29 +03:00
F: target/arm/tcg/
2018-04-05 17:45:32 +03:00
F: tests/tcg/arm/
2018-05-09 12:31:30 +03:00
F: tests/tcg/aarch64/
2021-05-26 20:04:21 +03:00
F: tests/qtest/arm-cpu-features.c
2013-02-04 18:19:30 +04:00
F: hw/arm/
F: hw/cpu/a*mpcore.c
2016-09-23 15:14:18 +03:00
F: include/hw/cpu/a*mpcore.h
2020-03-10 00:58:15 +03:00
F: docs/system/target-arm.rst
2020-11-20 18:45:40 +03:00
F: docs/system/arm/cpu-features.rst
2010-09-09 23:51:31 +04:00
2018-11-22 21:01:43 +03:00
ARM SMMU
M: Eric Auger <eric.auger@redhat.com>
L: qemu-arm@nongnu.org
S: Maintained
F: hw/arm/smmu*
F: include/hw/arm/smmu*
2021-11-05 18:53:54 +03:00
F: tests/avocado/smmu.py
2018-11-22 21:01:43 +03:00
2020-01-24 03:51:07 +03:00
AVR TCG CPUs
M: Michael Rolnik <mrolnik@gmail.com>
S: Maintained
2020-08-12 18:53:04 +03:00
F: docs/system/target-avr.rst
2020-01-26 20:52:23 +03:00
F: gdb-xml/avr-cpu.xml
2020-01-24 03:51:07 +03:00
F: target/avr/
2021-11-05 18:53:54 +03:00
F: tests/avocado/machine_avr6.py
2020-01-24 03:51:07 +03:00
2019-06-06 20:24:07 +03:00
CRIS TCG CPUs
2010-09-09 23:51:31 +04:00
M: Edgar E. Iglesias <edgar.iglesias@gmail.com>
S: Maintained
2016-10-11 09:56:52 +03:00
F: target/cris/
2013-02-04 18:19:30 +04:00
F: hw/cris/
2016-09-23 19:08:46 +03:00
F: include/hw/cris/
2014-10-22 02:31:28 +04:00
F: tests/tcg/cris/
2015-09-22 12:36:16 +03:00
F: disas/cris.c
2010-09-09 23:51:31 +04:00
2021-02-08 08:45:51 +03:00
Hexagon TCG CPUs
2023-05-24 19:11:26 +03:00
M: Brian Cain <bcain@quicinc.com>
2021-02-08 08:45:51 +03:00
S: Supported
F: target/hexagon/
2022-09-23 20:38:21 +03:00
X: target/hexagon/idef-parser/
X: target/hexagon/gen_idef_parser_funcs.py
2021-02-08 08:45:51 +03:00
F: linux-user/hexagon/
F: tests/tcg/hexagon/
F: disas/hexagon.c
2021-07-07 16:17:43 +03:00
F: configs/targets/hexagon-linux-user/default.mak
2021-05-12 13:20:26 +03:00
F: docker/dockerfiles/debian-hexagon-cross.docker
2023-05-04 18:37:33 +03:00
F: gdb-xml/hexagon*.xml
2021-02-08 08:45:51 +03:00
2022-09-23 20:38:21 +03:00
Hexagon idef-parser
M: Alessandro Di Federico <ale@rev.ng>
M: Anton Johansson <anjo@rev.ng>
S: Supported
F: target/hexagon/idef-parser/
F: target/hexagon/gen_idef_parser_funcs.py
2019-06-06 20:24:07 +03:00
HPPA (PA-RISC) TCG CPUs
2020-11-13 07:35:43 +03:00
M: Richard Henderson <richard.henderson@linaro.org>
2016-12-15 22:26:14 +03:00
S: Maintained
F: target/hppa/
F: disas/hppa.c
2023-10-18 09:24:01 +03:00
F: tests/tcg/hppa/
2016-12-15 22:26:14 +03:00
2022-06-06 15:42:51 +03:00
LoongArch TCG CPUs
M: Song Gao <gaosong@loongson.cn>
S: Maintained
F: target/loongarch/
2022-06-06 15:43:32 +03:00
F: tests/tcg/loongarch64/
2023-05-13 04:27:44 +03:00
F: tests/avocado/machine_loongarch.py
2022-06-06 15:42:51 +03:00
2019-06-06 20:24:07 +03:00
M68K TCG CPUs
2016-05-06 13:30:29 +03:00
M: Laurent Vivier <laurent@vivier.eu>
S: Maintained
2016-10-11 09:56:52 +03:00
F: target/m68k/
2016-11-02 11:39:33 +03:00
F: disas/m68k.c
2023-10-18 09:24:01 +03:00
F: tests/tcg/m68k/
2010-09-09 23:51:31 +04:00
2019-06-06 20:24:07 +03:00
MicroBlaze TCG CPUs
2010-09-09 23:51:31 +04:00
M: Edgar E. Iglesias <edgar.iglesias@gmail.com>
S: Maintained
2016-10-11 09:56:52 +03:00
F: target/microblaze/
2013-02-04 18:19:30 +04:00
F: hw/microblaze/
2015-09-22 12:36:16 +03:00
F: disas/microblaze.c
2021-10-26 13:22:12 +03:00
F: tests/docker/dockerfiles/debian-microblaze-cross.d/build-toolchain.sh
2010-09-09 23:51:31 +04:00
2019-06-06 20:24:07 +03:00
MIPS TCG CPUs
2022-10-17 21:20:05 +03:00
M: Philippe Mathieu-Daudé <philmd@linaro.org>
2020-03-13 04:00:50 +03:00
R: Aurelien Jarno <aurelien@aurel32.net>
2020-07-01 21:25:58 +03:00
R: Jiaxun Yang <jiaxun.yang@flygoat.com>
2024-02-09 09:21:47 +03:00
R: Aleksandar Rikalo <arikalo@gmail.com>
2020-10-09 18:05:13 +03:00
S: Odd Fixes
2016-10-11 09:56:52 +03:00
F: target/mips/
2022-10-31 01:38:49 +03:00
F: disas/*mips.c
docs/system: Convert qemu-cpu-models.texi to rST
This doc was originally written by Daniel P. Berrangé
<berrange@redhat.com>, introduced via commit[1]: 2544e9e4aa (docs: add
guidance on configuring CPU models for x86, 2018-06-27).
In this patch:
- 1-1 conversion of Texinfo to rST, besides a couple of minor
tweaks that are too trivial to mention. (Thanks to Stephen
Finucane on IRC for the suggestion to use rST "definition lists"
instead of bullets in some places.)
Further modifications will be done via a separate patch.
- rST and related infra changes: manual page generation, Makefile
fixes, clean up references to qemu-cpu-models.texi, update year in
the copyright notice, etc.
[1] https://git.qemu.org/?p=qemu.git;a=commit;h=2544e9e4aa
As part of the conversion, we use a more generic 'author' attribution
for the manpage than we previously had, as agreed with the original
author Dan Berrange.
Signed-off-by: Kashyap Chamarthy <kchamart@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Tested-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20200228153619.9906-16-peter.maydell@linaro.org
Message-id: 20200226113034.6741-15-pbonzini@redhat.com
[Move macros to defs.rst.inc, split in x86 and MIPS parts,
make qemu-cpu-models.rst a standalone document. - Paolo]
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
[PMM: Move defs.rst.inc setup to its own commit;
fix minor issues with MAINTAINERS file updates;
drop copyright date change; keep capitalization of
"QEMU Project developers" consistent with other uses;
minor Makefile fixups]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-02-28 18:36:01 +03:00
F: docs/system/cpu-models-mips.rst.inc
2014-10-22 02:31:28 +04:00
F: tests/tcg/mips/
2010-09-09 23:51:31 +04:00
2019-06-06 20:24:07 +03:00
OpenRISC TCG CPUs
2017-03-15 16:37:41 +03:00
M: Stafford Horne <shorne@gmail.com>
S: Odd Fixes
2022-12-12 20:48:41 +03:00
F: docs/system/openrisc/cpu-features.rst
2016-10-11 09:56:52 +03:00
F: target/openrisc/
2013-07-02 16:55:17 +04:00
F: hw/openrisc/
2023-10-17 18:42:42 +03:00
F: include/hw/openrisc/
2014-10-22 02:31:28 +04:00
F: tests/tcg/openrisc/
2013-07-02 16:55:17 +04:00
2019-06-06 20:24:07 +03:00
PowerPC TCG CPUs
2023-09-15 14:05:07 +03:00
M: Nicholas Piggin <npiggin@gmail.com>
2021-11-05 06:28:51 +03:00
M: Daniel Henrique Barboza <danielhb413@gmail.com>
2012-01-13 17:33:57 +04:00
L: qemu-ppc@nongnu.org
2022-11-17 18:32:18 +03:00
S: Odd Fixes
2016-10-11 09:56:52 +03:00
F: target/ppc/
2021-09-27 07:17:45 +03:00
F: hw/ppc/ppc.c
F: hw/ppc/ppc_booke.c
F: include/hw/ppc/ppc.h
2023-10-02 18:51:42 +03:00
F: hw/ppc/meson.build
F: hw/ppc/trace*
F: configs/devices/ppc*
F: docs/system/ppc/embedded.rst
F: docs/system/target-ppc.rst
2023-10-18 09:24:01 +03:00
F: tests/tcg/ppc*/*
2010-09-09 23:51:31 +04:00
2019-06-06 20:24:07 +03:00
RISC-V TCG CPUs
2019-10-29 19:39:03 +03:00
M: Palmer Dabbelt <palmer@dabbelt.com>
2021-04-07 01:48:25 +03:00
M: Alistair Francis <alistair.francis@wdc.com>
2024-05-05 10:23:12 +03:00
M: Bin Meng <bmeng.cn@gmail.com>
2023-10-30 11:16:07 +03:00
R: Weiwei Li <liwei1518@gmail.com>
2023-02-09 03:33:08 +03:00
R: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
R: Liu Zhiwei <zhiwei_liu@linux.alibaba.com>
2018-10-30 19:19:05 +03:00
L: qemu-riscv@nongnu.org
2018-11-21 23:57:36 +03:00
S: Supported
2023-09-29 15:37:27 +03:00
F: configs/targets/riscv*
F: docs/system/target-riscv.rst
2018-03-02 15:31:09 +03:00
F: target/riscv/
F: hw/riscv/
2023-09-29 15:37:27 +03:00
F: hw/intc/riscv*
2018-03-02 15:31:09 +03:00
F: include/hw/riscv/
2018-12-19 22:16:31 +03:00
F: linux-user/host/riscv32/
2018-12-19 22:16:41 +03:00
F: linux-user/host/riscv64/
2023-10-18 09:24:01 +03:00
F: tests/tcg/riscv64/
2018-03-02 15:31:09 +03:00
2023-01-31 23:20:13 +03:00
RISC-V XThead* extensions
M: Christoph Muellner <christoph.muellner@vrull.eu>
M: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
L: qemu-riscv@nongnu.org
S: Supported
F: target/riscv/insn_trans/trans_xthead.c.inc
F: target/riscv/xthead*.decode
2024-04-29 10:36:56 +03:00
F: target/riscv/th_*
2023-09-29 15:37:27 +03:00
F: disas/riscv-xthead*
2023-01-31 23:20:13 +03:00
2022-02-02 03:52:49 +03:00
RISC-V XVentanaCondOps extension
M: Philipp Tomsich <philipp.tomsich@vrull.eu>
L: qemu-riscv@nongnu.org
2023-03-07 21:07:08 +03:00
S: Maintained
2022-02-02 03:52:49 +03:00
F: target/riscv/XVentanaCondOps.decode
F: target/riscv/insn_trans/trans_xventanacondops.c.inc
2023-09-29 15:37:27 +03:00
F: disas/riscv-xventana*
2022-02-02 03:52:49 +03:00
2019-01-21 16:20:54 +03:00
RENESAS RX CPUs
2021-03-12 18:55:12 +03:00
R: Yoshinori Sato <ysato@users.sourceforge.jp>
S: Orphan
2019-01-21 16:20:54 +03:00
F: target/rx/
2019-06-06 20:24:07 +03:00
S390 TCG CPUs
2020-11-13 07:35:43 +03:00
M: Richard Henderson <richard.henderson@linaro.org>
2018-01-15 18:18:20 +03:00
M: David Hildenbrand <david@redhat.com>
2022-10-19 15:56:40 +03:00
R: Ilya Leoshkevich <iii@linux.ibm.com>
2010-09-09 23:51:31 +04:00
S: Maintained
2016-10-11 09:56:52 +03:00
F: target/s390x/
2021-07-07 13:53:17 +03:00
F: target/s390x/tcg
2013-02-04 18:19:30 +04:00
F: hw/s390x/
2018-08-21 05:50:58 +03:00
F: tests/tcg/s390x/
2017-10-05 18:05:23 +03:00
L: qemu-s390x@nongnu.org
2010-09-09 23:51:31 +04:00
2019-06-06 20:24:07 +03:00
SH4 TCG CPUs
2021-03-12 18:55:13 +03:00
R: Yoshinori Sato <ysato@users.sourceforge.jp>
S: Orphan
2016-10-11 09:56:52 +03:00
F: target/sh4/
2013-02-04 18:19:30 +04:00
F: hw/sh4/
2015-09-22 12:36:16 +03:00
F: disas/sh4.c
2016-09-10 00:18:21 +03:00
F: include/hw/sh4/
2023-10-18 09:24:01 +03:00
F: tests/tcg/sh4/
2010-09-09 23:51:31 +04:00
2019-06-06 20:24:07 +03:00
SPARC TCG CPUs
2015-03-03 01:23:27 +03:00
M: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2016-06-20 23:55:16 +03:00
M: Artyom Tarasenko <atar4qemu@gmail.com>
2010-09-09 23:51:31 +04:00
S: Maintained
2016-10-11 09:56:52 +03:00
F: target/sparc/
2013-02-04 18:19:30 +04:00
F: hw/sparc/
F: hw/sparc64/
2018-11-25 23:49:37 +03:00
F: include/hw/sparc/sparc64.h
2015-09-22 12:36:16 +03:00
F: disas/sparc.c
2023-10-18 09:24:01 +03:00
F: tests/tcg/sparc64/
2010-09-09 23:51:31 +04:00
2019-06-06 20:24:07 +03:00
X86 TCG CPUs
2014-10-21 17:16:06 +04:00
M: Paolo Bonzini <pbonzini@redhat.com>
2020-11-13 07:35:43 +03:00
M: Richard Henderson <richard.henderson@linaro.org>
2021-11-30 23:47:22 +03:00
M: Eduardo Habkost <eduardo@habkost.net>
2015-04-08 14:36:24 +03:00
S: Maintained
2021-03-22 16:27:40 +03:00
F: target/i386/tcg/
2018-04-05 17:35:11 +03:00
F: tests/tcg/i386/
2018-04-17 13:14:37 +03:00
F: tests/tcg/x86_64/
2013-02-04 18:19:30 +04:00
F: hw/i386/
2022-12-12 20:48:41 +03:00
F: docs/system/i386/cpu.rst
2021-06-07 16:58:40 +03:00
F: docs/system/cpu-models-x86*
2020-12-15 00:20:32 +03:00
T: git https://gitlab.com/ehabkost/qemu.git x86-next
2010-09-09 23:51:31 +04:00
2019-06-06 20:24:07 +03:00
Xtensa TCG CPUs
2011-09-06 03:55:56 +04:00
M: Max Filippov <jcmvbkbc@gmail.com>
2018-02-28 08:15:34 +03:00
W: http://wiki.osll.ru/doku.php?id=etc:users:jcmvbkbc:qemu-target-xtensa
2011-09-06 03:55:56 +04:00
S: Maintained
2016-10-11 09:56:52 +03:00
F: target/xtensa/
2013-02-04 18:19:30 +04:00
F: hw/xtensa/
2014-10-22 02:31:28 +04:00
F: tests/tcg/xtensa/
2021-10-02 08:01:52 +03:00
F: tests/tcg/xtensaeb/
2017-11-01 02:17:43 +03:00
F: disas/xtensa.c
2018-11-23 02:06:21 +03:00
F: include/hw/xtensa/xtensa-isa.h
2021-07-07 16:17:43 +03:00
F: configs/devices/xtensa*/default.mak
2011-09-06 03:55:56 +04:00
2019-06-06 20:24:07 +03:00
TriCore TCG CPUs
2014-09-01 15:59:46 +04:00
M: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
S: Maintained
2016-10-11 09:56:52 +03:00
F: target/tricore/
2014-09-01 15:59:46 +04:00
F: hw/tricore/
2016-09-10 00:17:09 +03:00
F: include/hw/tricore/
2021-05-12 13:20:34 +03:00
F: tests/tcg/tricore/
2014-09-01 15:59:46 +04:00
2018-04-05 17:03:22 +03:00
Multiarch Linux User Tests
M: Alex Bennée <alex.bennee@linaro.org>
2019-03-01 19:35:18 +03:00
S: Maintained
2018-04-05 17:03:22 +03:00
F: tests/tcg/multiarch/
2019-06-06 20:24:08 +03:00
Guest CPU Cores (KVM)
---------------------
2019-06-06 20:24:07 +03:00
Overall KVM CPUs
2013-06-04 17:06:37 +04:00
M: Paolo Bonzini <pbonzini@redhat.com>
2010-09-09 23:51:31 +04:00
L: kvm@vger.kernel.org
S: Supported
2020-06-18 15:33:33 +03:00
F: */*/kvm*