* target/i386: miscellaneous changes, mostly TCG-related

* fix --without-default-devices build
 * fix --without-default-devices qtests on s390x and arm
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Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* target/i386: miscellaneous changes, mostly TCG-related
* fix --without-default-devices build
* fix --without-default-devices qtests on s390x and arm

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# gpg:                 aka "Paolo Bonzini <pbonzini@redhat.com>" [full]

* tag 'for-upstream' of https://gitlab.com/bonzini/qemu: (27 commits)
  configs: disable emulators that require it if libfdt is not found
  hw/xtensa: require libfdt
  kconfig: express dependency of individual boards on libfdt
  kconfig: allow compiling out QEMU device tree code per target
  meson: move libfdt together with other dependencies
  meson: pick libfdt from common_ss when building target-specific files
  tests/qtest: arm: fix operation in a build without any boards or devices
  i386: select correct components for no-board build
  hw/i386: move rtc-reset-reinjection command out of hw/rtc
  hw/i386: split x86.c in multiple parts
  i386: pc: remove unnecessary MachineClass overrides
  i386: correctly select code in hw/i386 that depends on other components
  xen: register legacy backends via xen_backend_init
  xen: initialize legacy backends from xen_bus_init()
  tests/qtest: s390x: fix operation in a build without any boards or devices
  s390x: select correct components for no-board build
  s390: move css_migration_enabled from machine to css.c
  s390_flic: add migration-enabled property
  s390x: move s390_cpu_addr2state to target/s390x/sigp.c
  sh4: select correct components for no-board build
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2024-05-12 13:41:26 +02:00
commit 9360070196
90 changed files with 1515 additions and 1334 deletions

View File

@ -648,9 +648,9 @@ build-tci:
- make check-tcg
# Check our reduced build configurations
# requires libfdt: aarch64, arm, i386, loongarch64, microblaze, microblazeel,
# mips64el, or1k, ppc, ppc64, riscv32, riscv64, rx, x86_64
# does not build without boards: i386, s390x, sh4, sh4eb, x86_64
# requires libfdt: aarch64, arm, loongarch64, microblaze, microblazeel,
# or1k, ppc64, riscv32, riscv64, rx
# fails qtest without boards: i386, x86_64
build-without-defaults:
extends: .native_build_job_template
needs:
@ -665,7 +665,8 @@ build-without-defaults:
--disable-qom-cast-debug
--disable-strip
TARGETS: alpha-softmmu avr-softmmu cris-softmmu hppa-softmmu m68k-softmmu
mips-softmmu mips64-softmmu mipsel-softmmu sparc-softmmu
mips-softmmu mips64-softmmu mipsel-softmmu mips64el-softmmu
ppc-softmmu s390x-softmmu sh4-softmmu sh4eb-softmmu sparc-softmmu
sparc64-softmmu tricore-softmmu xtensa-softmmu xtensaeb-softmmu
hexagon-linux-user i386-linux-user s390x-linux-user
MAKE_CHECK_ARGS: check

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@ -23,6 +23,9 @@ config IVSHMEM
config TPM
bool
config FDT
bool
config VHOST_USER
bool

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@ -3,4 +3,5 @@ TARGET_BASE_ARCH=arm
TARGET_SUPPORTS_MTTCG=y
TARGET_KVM_HAVE_GUEST_DEBUG=y
TARGET_XML_FILES= gdb-xml/aarch64-core.xml gdb-xml/aarch64-fpu.xml gdb-xml/arm-core.xml gdb-xml/arm-vfp.xml gdb-xml/arm-vfp3.xml gdb-xml/arm-vfp-sysregs.xml gdb-xml/arm-neon.xml gdb-xml/arm-m-profile.xml gdb-xml/arm-m-profile-mve.xml gdb-xml/aarch64-pauth.xml
# needed by boot.c
TARGET_NEED_FDT=y

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@ -1,4 +1,5 @@
TARGET_ARCH=arm
TARGET_SUPPORTS_MTTCG=y
TARGET_XML_FILES= gdb-xml/arm-core.xml gdb-xml/arm-vfp.xml gdb-xml/arm-vfp3.xml gdb-xml/arm-vfp-sysregs.xml gdb-xml/arm-neon.xml gdb-xml/arm-m-profile.xml gdb-xml/arm-m-profile-mve.xml
# needed by boot.c
TARGET_NEED_FDT=y

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@ -1,5 +1,4 @@
TARGET_ARCH=i386
TARGET_SUPPORTS_MTTCG=y
TARGET_NEED_FDT=y
TARGET_KVM_HAVE_GUEST_DEBUG=y
TARGET_XML_FILES= gdb-xml/i386-32bit.xml

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@ -2,4 +2,5 @@ TARGET_ARCH=loongarch64
TARGET_BASE_ARCH=loongarch
TARGET_SUPPORTS_MTTCG=y
TARGET_XML_FILES= gdb-xml/loongarch-base32.xml gdb-xml/loongarch-base64.xml gdb-xml/loongarch-fpu.xml
# all boards require libfdt
TARGET_NEED_FDT=y

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@ -1,5 +1,6 @@
TARGET_ARCH=microblaze
TARGET_BIG_ENDIAN=y
TARGET_SUPPORTS_MTTCG=y
# needed by boot.c
TARGET_NEED_FDT=y
TARGET_XML_FILES=gdb-xml/microblaze-core.xml gdb-xml/microblaze-stack-protect.xml

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@ -1,4 +1,5 @@
TARGET_ARCH=microblaze
TARGET_SUPPORTS_MTTCG=y
# needed by boot.c
TARGET_NEED_FDT=y
TARGET_XML_FILES=gdb-xml/microblaze-core.xml gdb-xml/microblaze-stack-protect.xml

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@ -1,3 +1,2 @@
TARGET_ARCH=mips64
TARGET_BASE_ARCH=mips
TARGET_NEED_FDT=y

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@ -1,4 +1,5 @@
TARGET_ARCH=openrisc
TARGET_SUPPORTS_MTTCG=y
TARGET_BIG_ENDIAN=y
# needed by boot.c and all boards
TARGET_NEED_FDT=y

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@ -2,4 +2,3 @@ TARGET_ARCH=ppc
TARGET_BIG_ENDIAN=y
TARGET_KVM_HAVE_GUEST_DEBUG=y
TARGET_XML_FILES= gdb-xml/power-core.xml gdb-xml/power-fpu.xml gdb-xml/power-altivec.xml gdb-xml/power-spe.xml
TARGET_NEED_FDT=y

View File

@ -4,4 +4,5 @@ TARGET_BIG_ENDIAN=y
TARGET_SUPPORTS_MTTCG=y
TARGET_KVM_HAVE_GUEST_DEBUG=y
TARGET_XML_FILES= gdb-xml/power64-core.xml gdb-xml/power-fpu.xml gdb-xml/power-altivec.xml gdb-xml/power-spe.xml gdb-xml/power-vsx.xml
# all boards require libfdt
TARGET_NEED_FDT=y

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@ -2,4 +2,5 @@ TARGET_ARCH=riscv32
TARGET_BASE_ARCH=riscv
TARGET_SUPPORTS_MTTCG=y
TARGET_XML_FILES= gdb-xml/riscv-32bit-cpu.xml gdb-xml/riscv-32bit-fpu.xml gdb-xml/riscv-64bit-fpu.xml gdb-xml/riscv-32bit-virtual.xml
# needed by boot.c
TARGET_NEED_FDT=y

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@ -2,4 +2,5 @@ TARGET_ARCH=riscv64
TARGET_BASE_ARCH=riscv
TARGET_SUPPORTS_MTTCG=y
TARGET_XML_FILES= gdb-xml/riscv-64bit-cpu.xml gdb-xml/riscv-32bit-fpu.xml gdb-xml/riscv-64bit-fpu.xml gdb-xml/riscv-64bit-virtual.xml
# needed by boot.c
TARGET_NEED_FDT=y

View File

@ -1,3 +1,4 @@
TARGET_ARCH=rx
TARGET_XML_FILES= gdb-xml/rx-core.xml
# all boards require libfdt
TARGET_NEED_FDT=y

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@ -1,6 +1,5 @@
TARGET_ARCH=x86_64
TARGET_BASE_ARCH=i386
TARGET_SUPPORTS_MTTCG=y
TARGET_NEED_FDT=y
TARGET_KVM_HAVE_GUEST_DEBUG=y
TARGET_XML_FILES= gdb-xml/i386-64bit.xml

2
configure vendored
View File

@ -762,7 +762,7 @@ for opt do
--*) meson_option_parse "$opt" "$optarg"
;;
# Pass through -Dxxxx options to meson
-D*) meson_options="$meson_options $opt"
-D*) meson_option_add "$opt"
;;
esac
done

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@ -432,6 +432,14 @@ Backend ``memory`` (since 9.0)
CPU device properties
'''''''''''''''''''''
``pcommit`` on x86 (since 9.1)
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
The PCOMMIT instruction was never included in any physical processor.
It was implemented as a no-op instruction in TCG up to QEMU 9.0, but
only with ``-cpu max`` (which does not guarantee migration compatibility
across versions).
``pmu-num=n`` on RISC-V CPUs (since 8.2)
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

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@ -513,7 +513,7 @@ static void xen_9pfs_alloc(struct XenLegacyDevice *xendev)
xenstore_write_be_int(xendev, "max-ring-page-order", MAX_RING_ORDER);
}
struct XenDevOps xen_9pfs_ops = {
static struct XenDevOps xen_9pfs_ops = {
.size = sizeof(Xen9pfsDev),
.flags = DEVOPS_FLAG_NEED_GNTDEV,
.alloc = xen_9pfs_alloc,
@ -522,3 +522,9 @@ struct XenDevOps xen_9pfs_ops = {
.disconnect = xen_9pfs_disconnect,
.free = xen_9pfs_free,
};
static void xen_9pfs_register_backend(void)
{
xen_be_register("9pfs", &xen_9pfs_ops);
}
xen_backend_init(xen_9pfs_register_backend);

View File

@ -15,6 +15,7 @@ config ARM_VIRT
select ACPI
select ARM_SMMUV3
select GPIO_KEY
select DEVICE_TREE
select FW_CFG_DMA
select PCI_EXPRESS
select PCI_EXPRESS_GENERIC_BRIDGE
@ -265,6 +266,7 @@ config SBSA_REF
default y
depends on TCG && AARCH64
imply PCI_DEVICES
select DEVICE_TREE
select AHCI
select ARM_SMMUV3
select GPIO_KEY
@ -347,6 +349,7 @@ config VEXPRESS
bool
default y
depends on TCG && ARM
select DEVICE_TREE
select A9MPCORE
select A15MPCORE
select ARM_MPTIMER
@ -492,6 +495,7 @@ config XLNX_ZYNQMP_ARM
select CPU_CLUSTER
select DDC
select DPCD
select DEVICE_TREE
select SDHCI
select SSI
select SSI_M25P80
@ -509,6 +513,7 @@ config XLNX_VERSAL
depends on TCG && AARCH64
select ARM_GIC
select CPU_CLUSTER
select DEVICE_TREE
select PL011
select CADENCE
select VIRTIO_MMIO

View File

@ -1,5 +1,5 @@
arm_ss = ss.source_set()
arm_ss.add(files('boot.c'), fdt)
arm_ss.add(files('boot.c'))
arm_ss.add(when: 'CONFIG_ARM_VIRT', if_true: files('virt.c'))
arm_ss.add(when: 'CONFIG_ACPI', if_true: files('virt-acpi-build.c'))
arm_ss.add(when: 'CONFIG_DIGIC', if_true: files('digic_boards.c'))

View File

@ -4,8 +4,14 @@ config EMPTY_SLOT
config PTIMER
bool
config DEVICE_TREE
bool
# fail the build if libfdt not found
depends on FDT
config FITLOADER
bool
depends on DEVICE_TREE
config GENERIC_LOADER
bool
@ -14,13 +20,14 @@ config GENERIC_LOADER
config GUEST_LOADER
bool
default y
depends on TCG
depends on TCG && DEVICE_TREE
config OR_IRQ
bool
config PLATFORM_BUS
bool
depends on DEVICE_TREE
config REGISTER
bool

View File

@ -16,7 +16,7 @@ common_ss.add(files('cpu-common.c'))
common_ss.add(files('machine-smp.c'))
system_ss.add(when: 'CONFIG_FITLOADER', if_true: files('loader-fit.c'))
system_ss.add(when: 'CONFIG_GENERIC_LOADER', if_true: files('generic-loader.c'))
system_ss.add(when: ['CONFIG_GUEST_LOADER', fdt], if_true: files('guest-loader.c'))
system_ss.add(when: 'CONFIG_GUEST_LOADER', if_true: files('guest-loader.c'))
system_ss.add(when: 'CONFIG_OR_IRQ', if_true: files('or-irq.c'))
system_ss.add(when: 'CONFIG_PLATFORM_BUS', if_true: files('platform-bus.c'))
system_ss.add(when: 'CONFIG_PTIMER', if_true: files('ptimer.c'))

View File

@ -972,7 +972,7 @@ static void fb_event(struct XenLegacyDevice *xendev)
/* -------------------------------------------------------------------- */
struct XenDevOps xen_kbdmouse_ops = {
static struct XenDevOps xen_kbdmouse_ops = {
.size = sizeof(struct XenInput),
.init = input_init,
.initialise = input_initialise,
@ -995,3 +995,9 @@ static const GraphicHwOps xenfb_ops = {
.gfx_update = xenfb_update,
.ui_info = xenfb_ui_info,
};
static void xen_vkbd_register_backend(void)
{
xen_be_register("vkbd", &xen_kbdmouse_ops);
}
xen_backend_init(xen_vkbd_register_backend);

View File

@ -115,7 +115,8 @@ config Q35
config MICROVM
bool
default y
depends on I386
depends on I386 && FDT
select DEVICE_TREE
select SERIAL_ISA # for serial_hds_isa_init()
select ISA_BUS
select APIC

View File

@ -203,6 +203,7 @@ void fw_cfg_build_feature_control(MachineState *ms, FWCfgState *fw_cfg)
fw_cfg_add_file(fw_cfg, "etc/msr_feature_control", val, sizeof(*val));
}
#ifdef CONFIG_ACPI
void fw_cfg_add_acpi_dsdt(Aml *scope, FWCfgState *fw_cfg)
{
/*
@ -229,3 +230,4 @@ void fw_cfg_add_acpi_dsdt(Aml *scope, FWCfgState *fw_cfg)
aml_append(dev, aml_name_decl("_CRS", crs));
aml_append(scope, dev);
}
#endif

View File

@ -1,18 +1,20 @@
i386_ss = ss.source_set()
i386_ss.add(files(
'fw_cfg.c',
'vapic.c',
'e820_memory_layout.c',
'monitor.c',
'multiboot.c',
'x86.c',
'x86-cpu.c',
))
i386_ss.add(when: 'CONFIG_APIC', if_true: files('vapic.c'))
i386_ss.add(when: 'CONFIG_X86_IOMMU', if_true: files('x86-iommu.c'),
if_false: files('x86-iommu-stub.c'))
i386_ss.add(when: 'CONFIG_AMD_IOMMU', if_true: files('amd_iommu.c'),
if_false: files('amd_iommu-stub.c'))
i386_ss.add(when: 'CONFIG_I440FX', if_true: files('pc_piix.c'))
i386_ss.add(when: 'CONFIG_MICROVM', if_true: files('microvm.c', 'acpi-microvm.c', 'microvm-dt.c'))
i386_ss.add(when: 'CONFIG_MICROVM', if_true: files('x86-common.c', 'microvm.c', 'acpi-microvm.c', 'microvm-dt.c'))
i386_ss.add(when: 'CONFIG_Q35', if_true: files('pc_q35.c'))
i386_ss.add(when: 'CONFIG_VMMOUSE', if_true: files('vmmouse.c'))
i386_ss.add(when: 'CONFIG_VMPORT', if_true: files('vmport.c'))
@ -22,6 +24,7 @@ i386_ss.add(when: 'CONFIG_SGX', if_true: files('sgx-epc.c','sgx.c'),
i386_ss.add(when: 'CONFIG_ACPI', if_true: files('acpi-common.c'))
i386_ss.add(when: 'CONFIG_PC', if_true: files(
'x86-common.c',
'pc.c',
'pc_sysfw.c',
'acpi-build.c',

46
hw/i386/monitor.c Normal file
View File

@ -0,0 +1,46 @@
/*
* QEMU monitor
*
* Copyright (c) 2003-2004 Fabrice Bellard
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include "qemu/osdep.h"
#include "monitor/monitor.h"
#include "qapi/qmp/qdict.h"
#include "qapi/error.h"
#include "qapi/qapi-commands-misc-target.h"
#include "hw/i386/x86.h"
#include "hw/rtc/mc146818rtc.h"
#include CONFIG_DEVICES
void qmp_rtc_reset_reinjection(Error **errp)
{
X86MachineState *x86ms = X86_MACHINE(qdev_get_machine());
#ifdef CONFIG_MC146818RTC
if (x86ms->rtc) {
rtc_reset_reinjection(MC146818_RTC(x86ms->rtc));
}
#else
assert(!x86ms->rtc);
#endif
}

View File

@ -1250,7 +1250,6 @@ void pc_basic_device_init(struct PCMachineState *pcms,
pci_create_simple(pcms->pcibus, -1, "xen-platform");
}
xen_bus_init();
xen_be_init();
}
#endif
@ -1827,9 +1826,6 @@ static void pc_machine_class_init(ObjectClass *oc, void *data)
assert(!mc->get_hotplug_handler);
mc->get_hotplug_handler = pc_get_hotplug_handler;
mc->hotplug_allowed = pc_hotplug_allowed;
mc->cpu_index_to_instance_props = x86_cpu_index_to_props;
mc->get_default_cpu_node_id = x86_get_default_cpu_node_id;
mc->possible_cpu_arch_ids = x86_possible_cpu_arch_ids;
mc->auto_enable_numa_with_memhp = true;
mc->auto_enable_numa_with_memdev = true;
mc->has_hotpluggable_cpus = true;

1007
hw/i386/x86-common.c Normal file

File diff suppressed because it is too large Load Diff

97
hw/i386/x86-cpu.c Normal file
View File

@ -0,0 +1,97 @@
/*
* Copyright (c) 2003-2004 Fabrice Bellard
* Copyright (c) 2019, 2024 Red Hat, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include "qemu/osdep.h"
#include "sysemu/whpx.h"
#include "sysemu/cpu-timers.h"
#include "trace.h"
#include "hw/i386/x86.h"
#include "target/i386/cpu.h"
#include "hw/intc/i8259.h"
#include "hw/irq.h"
#include "sysemu/kvm.h"
/* TSC handling */
uint64_t cpu_get_tsc(CPUX86State *env)
{
return cpus_get_elapsed_ticks();
}
/* IRQ handling */
static void pic_irq_request(void *opaque, int irq, int level)
{
CPUState *cs = first_cpu;
X86CPU *cpu = X86_CPU(cs);
trace_x86_pic_interrupt(irq, level);
if (cpu_is_apic_enabled(cpu->apic_state) && !kvm_irqchip_in_kernel() &&
!whpx_apic_in_platform()) {
CPU_FOREACH(cs) {
cpu = X86_CPU(cs);
if (apic_accept_pic_intr(cpu->apic_state)) {
apic_deliver_pic_intr(cpu->apic_state, level);
}
}
} else {
if (level) {
cpu_interrupt(cs, CPU_INTERRUPT_HARD);
} else {
cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD);
}
}
}
qemu_irq x86_allocate_cpu_irq(void)
{
return qemu_allocate_irq(pic_irq_request, NULL, 0);
}
int cpu_get_pic_interrupt(CPUX86State *env)
{
X86CPU *cpu = env_archcpu(env);
int intno;
if (!kvm_irqchip_in_kernel() && !whpx_apic_in_platform()) {
intno = apic_get_interrupt(cpu->apic_state);
if (intno >= 0) {
return intno;
}
/* read the irq from the PIC */
if (!apic_accept_pic_intr(cpu->apic_state)) {
return -1;
}
}
intno = pic_read_irq(isa_pic);
return intno;
}
DeviceState *cpu_get_current_apic(void)
{
if (current_cpu) {
X86CPU *cpu = X86_CPU(current_cpu);
return cpu->apic_state;
} else {
return NULL;
}
}

File diff suppressed because it is too large Load Diff

29
hw/intc/ioapic-stub.c Normal file
View File

@ -0,0 +1,29 @@
/*
* ioapic.c IOAPIC emulation logic
*
* Copyright (c) 2004-2005 Fabrice Bellard
*
* Split the ioapic logic from apic.c
* Xiantao Zhang <xiantao.zhang@intel.com>
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2.1 of the License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "hw/intc/ioapic.h"
void ioapic_eoi_broadcast(int vector)
{
}

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@ -20,7 +20,7 @@ system_ss.add(when: 'CONFIG_GOLDFISH_PIC', if_true: files('goldfish_pic.c'))
system_ss.add(when: 'CONFIG_HEATHROW_PIC', if_true: files('heathrow_pic.c'))
system_ss.add(when: 'CONFIG_I8259', if_true: files('i8259_common.c', 'i8259.c'))
system_ss.add(when: 'CONFIG_IMX', if_true: files('imx_avic.c', 'imx_gpcv2.c'))
system_ss.add(when: 'CONFIG_IOAPIC', if_true: files('ioapic_common.c'))
system_ss.add(when: 'CONFIG_IOAPIC', if_true: files('ioapic_common.c'), if_false: files('ioapic-stub.c'))
system_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_intc.c'))
system_ss.add(when: 'CONFIG_OPENPIC', if_true: files('openpic.c'))
system_ss.add(when: 'CONFIG_PL190', if_true: files('pl190.c'))

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@ -405,6 +405,8 @@ static void qemu_s390_flic_class_init(ObjectClass *oc, void *data)
static Property s390_flic_common_properties[] = {
DEFINE_PROP_UINT32("adapter_routes_max_batch", S390FLICState,
adapter_routes_max_batch, ADAPTER_ROUTES_MAX_GSI),
DEFINE_PROP_BOOL("migration-enabled", S390FLICState,
migration_enabled, true),
DEFINE_PROP_END_OF_LIST(),
};
@ -457,7 +459,9 @@ type_init(qemu_s390_flic_register_types)
static bool adapter_info_so_needed(void *opaque)
{
return css_migration_enabled();
S390FLICState *fs = S390_FLIC_COMMON(opaque);
return fs->migration_enabled;
}
const VMStateDescription vmstate_adapter_info_so = {

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@ -1,7 +1,8 @@
config LOONGARCH_VIRT
bool
default y
depends on LOONGARCH64
depends on LOONGARCH64 && FDT
select DEVICE_TREE
select PCI
select PCI_EXPRESS_GENERIC_BRIDGE
imply VIRTIO_VGA

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@ -3,7 +3,7 @@ loongarch_ss.add(files(
'fw_cfg.c',
'boot.c',
))
loongarch_ss.add(when: 'CONFIG_LOONGARCH_VIRT', if_true: [files('virt.c'), fdt])
loongarch_ss.add(when: 'CONFIG_LOONGARCH_VIRT', if_true: files('virt.c'))
loongarch_ss.add(when: 'CONFIG_ACPI', if_true: files('acpi-build.c'))
hw_arch += {'loongarch': loongarch_ss}

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@ -80,9 +80,10 @@ config MIPS_CPS
config MIPS_BOSTON
bool
default y
depends on MIPS64 && !TARGET_BIG_ENDIAN
depends on MIPS64 && !TARGET_BIG_ENDIAN && FDT
imply PCI_DEVICES
imply TEST_DEVICES
select DEVICE_TREE
select FITLOADER
select MIPS_CPS
select PCI_EXPRESS_XILINX

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@ -9,7 +9,7 @@ if 'CONFIG_TCG' in config_all_accel
mips_ss.add(when: 'CONFIG_JAZZ', if_true: files('jazz.c'))
mips_ss.add(when: 'CONFIG_MIPSSIM', if_true: files('mipssim.c'))
mips_ss.add(when: 'CONFIG_FULOONG', if_true: files('fuloong2e.c'))
mips_ss.add(when: 'CONFIG_MIPS_BOSTON', if_true: [files('boston.c'), fdt])
mips_ss.add(when: 'CONFIG_MIPS_BOSTON', if_true: files('boston.c'))
endif
hw_arch += {'mips': mips_ss}

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@ -2,6 +2,7 @@ config OR1K_SIM
bool
default y
depends on OPENRISC
select DEVICE_TREE
select SERIAL
select OPENCORES_ETH
select OMPIC
@ -14,6 +15,7 @@ config OR1K_VIRT
imply PCI_DEVICES
imply VIRTIO_VGA
imply TEST_DEVICES
select DEVICE_TREE
select PCI
select PCI_EXPRESS_GENERIC_BRIDGE
select GOLDFISH_RTC

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@ -1,7 +1,7 @@
openrisc_ss = ss.source_set()
openrisc_ss.add(files('cputimer.c'))
openrisc_ss.add(files('boot.c'))
openrisc_ss.add(when: 'CONFIG_OR1K_SIM', if_true: [files('openrisc_sim.c'), fdt])
openrisc_ss.add(when: 'CONFIG_OR1K_VIRT', if_true: [files('virt.c'), fdt])
openrisc_ss.add(when: 'CONFIG_OR1K_SIM', if_true: files('openrisc_sim.c'))
openrisc_ss.add(when: 'CONFIG_OR1K_VIRT', if_true: files('virt.c'))
hw_arch += {'openrisc': openrisc_ss}

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@ -1,7 +1,7 @@
config PSERIES
bool
default y
depends on PPC64
depends on PPC64 && FDT
imply USB_OHCI_PCI
imply PCI_DEVICES
imply TEST_DEVICES
@ -26,7 +26,7 @@ config SPAPR_RNG
config POWERNV
bool
default y
depends on PPC64
depends on PPC64 && FDT
imply PCI_DEVICES
imply TEST_DEVICES
select ISA_IPMI_BT
@ -52,7 +52,7 @@ config PPC405
config PPC440
bool
default y
depends on PPC
depends on PPC && FDT
imply PCI_DEVICES
imply TEST_DEVICES
imply E1000_PCI
@ -71,7 +71,7 @@ config PPC4XX
config SAM460EX
bool
default y
depends on PPC
depends on PPC && FDT
select PFLASH_CFI01
select IDE_SII3112
select M41T80
@ -168,19 +168,19 @@ config E500
config E500PLAT
bool
default y
depends on PPC
depends on PPC && FDT
select E500
config MPC8544DS
bool
default y
depends on PPC
depends on PPC && FDT
select E500
config VIRTEX
bool
default y
depends on PPC
depends on PPC && FDT
select PPC4XX
select PFLASH_CFI01
select SERIAL
@ -193,6 +193,7 @@ config FW_CFG_PPC
bool
config FDT_PPC
select DEVICE_TREE
bool
config VOF

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@ -3,9 +3,7 @@ ppc_ss.add(files(
'ppc.c',
'ppc_booke.c',
))
ppc_ss.add(when: 'CONFIG_FDT_PPC', if_true: [files(
'fdt.c',
), fdt])
ppc_ss.add(when: 'CONFIG_FDT_PPC', if_true: files('fdt.c'))
ppc_ss.add(when: 'CONFIG_FW_CFG_PPC', if_true: files('fw_cfg.c'))
# IBM pSeries (sPAPR)

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@ -12,6 +12,7 @@ config MICROCHIP_PFSOC
depends on RISCV64
select CADENCE_SDHCI
select CPU_CLUSTER
select DEVICE_TREE
select MCHP_PFSOC_DMC
select MCHP_PFSOC_IOSCB
select MCHP_PFSOC_MMUART
@ -37,6 +38,7 @@ config RISCV_VIRT
imply VIRTIO_VGA
imply TEST_DEVICES
imply TPM_TIS_SYSBUS
select DEVICE_TREE
select RISCV_NUMA
select GOLDFISH_RTC
select PCI
@ -82,6 +84,7 @@ config SIFIVE_U
depends on RISCV32 || RISCV64
select CADENCE
select CPU_CLUSTER
select DEVICE_TREE
select RISCV_ACLINT
select SIFIVE_GPIO
select SIFIVE_PDMA
@ -99,6 +102,7 @@ config SPIKE
bool
default y
depends on RISCV32 || RISCV64
select DEVICE_TREE
select RISCV_NUMA
select HTIF
select RISCV_ACLINT

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@ -1,5 +1,5 @@
riscv_ss = ss.source_set()
riscv_ss.add(files('boot.c'), fdt)
riscv_ss.add(files('boot.c'))
riscv_ss.add(when: 'CONFIG_RISCV_NUMA', if_true: files('numa.c'))
riscv_ss.add(files('riscv_hart.c'))
riscv_ss.add(when: 'CONFIG_OPENTITAN', if_true: files('opentitan.c'))

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@ -104,16 +104,9 @@ static void rtc_coalesced_timer_update(MC146818RtcState *s)
}
}
static QLIST_HEAD(, MC146818RtcState) rtc_devices =
QLIST_HEAD_INITIALIZER(rtc_devices);
void qmp_rtc_reset_reinjection(Error **errp)
void rtc_reset_reinjection(MC146818RtcState *rtc)
{
MC146818RtcState *s;
QLIST_FOREACH(s, &rtc_devices, link) {
s->irq_coalesced = 0;
}
rtc->irq_coalesced = 0;
}
static bool rtc_policy_slew_deliver_irq(MC146818RtcState *s)
@ -941,7 +934,6 @@ static void rtc_realizefn(DeviceState *dev, Error **errp)
object_property_add_tm(OBJECT(s), "date", rtc_get_date);
qdev_init_gpio_out(dev, &s->irq, 1);
QLIST_INSERT_HEAD(&rtc_devices, s, link);
}
MC146818RtcState *mc146818_rtc_init(ISABus *bus, int base_year,

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@ -8,5 +8,6 @@ config RX62N_MCU
config RX_GDBSIM
bool
default y
depends on RX
depends on RX && FDT
select DEVICE_TREE
select RX62N_MCU

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@ -23,6 +23,8 @@
#include "hw/s390x/s390-virtio-ccw.h"
#include "hw/s390x/s390-ccw.h"
bool css_migration_enabled = true;
typedef struct CrwContainer {
CRW crw;
QTAILQ_ENTRY(CrwContainer) sibling;
@ -180,7 +182,7 @@ static const VMStateDescription vmstate_orb = {
static bool vmstate_schdev_orb_needed(void *opaque)
{
return css_migration_enabled();
return css_migration_enabled;
}
static const VMStateDescription vmstate_schdev_orb = {
@ -388,7 +390,7 @@ static int subch_dev_post_load(void *opaque, int version_id)
css_subch_assign(s->cssid, s->ssid, s->schid, s->devno, s);
}
if (css_migration_enabled()) {
if (css_migration_enabled) {
/* No compat voodoo to do ;) */
return 0;
}
@ -412,7 +414,9 @@ static int subch_dev_post_load(void *opaque, int version_id)
void css_register_vmstate(void)
{
vmstate_register(NULL, 0, &vmstate_css, &channel_subsys);
if (css_migration_enabled) {
vmstate_register(NULL, 0, &vmstate_css, &channel_subsys);
}
}
IndAddr *get_indicator(hwaddr ind_addr, int len)

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@ -50,22 +50,6 @@
static Error *pv_mig_blocker;
S390CPU *s390_cpu_addr2state(uint16_t cpu_addr)
{
static MachineState *ms;
if (!ms) {
ms = MACHINE(qdev_get_machine());
g_assert(ms->possible_cpus);
}
/* CPU address corresponds to the core_id and the index */
if (cpu_addr >= ms->possible_cpus->len) {
return NULL;
}
return S390_CPU(ms->possible_cpus->cpus[cpu_addr].cpu);
}
static S390CPU *s390x_new_cpu(const char *typename, uint32_t core_id,
Error **errp)
{
@ -299,11 +283,9 @@ static void ccw_init(MachineState *machine)
s390_enable_css_support(s390_cpu_addr2state(0));
ret = css_create_css_image(VIRTUAL_CSSID, true);
assert(ret == 0);
if (css_migration_enabled()) {
css_register_vmstate();
}
css_register_vmstate();
/* Create VirtIO network adapters */
s390_create_virtio_net(BUS(css_bus), mc->default_nic);
@ -765,7 +747,6 @@ static void ccw_machine_class_init(ObjectClass *oc, void *data)
s390mc->ri_allowed = true;
s390mc->cpu_model_allowed = true;
s390mc->css_migration_enabled = true;
s390mc->hpage_1m_allowed = true;
s390mc->max_threads = 1;
mc->init = ccw_init;
@ -835,11 +816,6 @@ static const TypeInfo ccw_machine_info = {
},
};
bool css_migration_enabled(void)
{
return get_machine_class()->css_migration_enabled;
}
#define DEFINE_CCW_MACHINE(suffix, verstr, latest) \
static void ccw_machine_##suffix##_class_init(ObjectClass *oc, \
void *data) \
@ -1195,15 +1171,15 @@ static void ccw_machine_2_9_instance_options(MachineState *machine)
static void ccw_machine_2_9_class_options(MachineClass *mc)
{
S390CcwMachineClass *s390mc = S390_CCW_MACHINE_CLASS(mc);
static GlobalProperty compat[] = {
{ TYPE_S390_STATTRIB, "migration-enabled", "off", },
{ TYPE_S390_FLIC_COMMON, "migration-enabled", "off", },
};
ccw_machine_2_10_class_options(mc);
compat_props_add(mc->compat_props, hw_compat_2_9, hw_compat_2_9_len);
compat_props_add(mc->compat_props, compat, G_N_ELEMENTS(compat));
s390mc->css_migration_enabled = false;
css_migration_enabled = false;
}
DEFINE_CCW_MACHINE(2_9, "2.9", false);

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@ -1,5 +1,5 @@
sh4_ss = ss.source_set()
sh4_ss.add(files(
sh4_ss.add(when: 'CONFIG_SH7750', if_true: files(
'sh7750.c',
'sh7750_regnames.c',
))

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@ -1083,7 +1083,7 @@ static void usbback_event(struct XenLegacyDevice *xendev)
qemu_bh_schedule(usbif->bh);
}
struct XenDevOps xen_usb_ops = {
static struct XenDevOps xen_usb_ops = {
.size = sizeof(struct usbback_info),
.flags = DEVOPS_FLAG_NEED_GNTDEV,
.init = usbback_init,
@ -1095,15 +1095,9 @@ struct XenDevOps xen_usb_ops = {
.event = usbback_event,
};
#else /* USBIF_SHORT_NOT_OK */
static int usbback_not_supported(void)
static void xen_usb_register_backend(void)
{
return -EINVAL;
xen_be_register("qusb", &xen_usb_ops);
}
struct XenDevOps xen_usb_ops = {
.backend_register = usbback_not_supported,
};
xen_backend_init(xen_usb_register_backend);
#endif

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@ -13,6 +13,7 @@
#include "hw/sysbus.h"
#include "hw/xen/xen.h"
#include "hw/xen/xen-backend.h"
#include "hw/xen/xen-legacy-backend.h" /* xen_be_init() */
#include "hw/xen/xen-bus.h"
#include "hw/xen/xen-bus-helper.h"
#include "monitor/monitor.h"
@ -329,6 +330,9 @@ static void xen_bus_realize(BusState *bus, Error **errp)
goto fail;
}
/* Initialize legacy backend core & drivers */
xen_be_init();
if (xs_node_scanf(xenbus->xsh, XBT_NULL, "", /* domain root node */
"domid", NULL, "%u", &domid) == 1) {
xenbus->backend_id = domid;

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@ -872,8 +872,6 @@ void xen_register_ioreq(XenIOState *state, unsigned int max_cpus,
xen_bus_init();
xen_be_init();
return;
err:

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@ -622,27 +622,11 @@ void xen_be_init(void)
qbus_set_bus_hotplug_handler(xen_sysbus);
xen_set_dynamic_sysbus();
xen_be_register("vkbd", &xen_kbdmouse_ops);
#ifdef CONFIG_VIRTFS
xen_be_register("9pfs", &xen_9pfs_ops);
#endif
#ifdef CONFIG_USB_LIBUSB
xen_be_register("qusb", &xen_usb_ops);
#endif
}
int xen_be_register(const char *type, struct XenDevOps *ops)
{
char path[50];
int rc;
if (ops->backend_register) {
rc = ops->backend_register();
if (rc) {
return rc;
}
}
snprintf(path, sizeof(path), "device-model/%u/backends/%s", xen_domid,
type);

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@ -34,8 +34,7 @@ static void xen_init_pv(MachineState *machine)
{
setup_xen_backend_ops();
/* Initialize backend core & drivers */
xen_be_init();
xen_bus_init();
switch (xen_mode) {
case XEN_ATTACH:
@ -60,8 +59,6 @@ static void xen_init_pv(MachineState *machine)
vga_interface_created = true;
}
xen_bus_init();
/* config cleanup hook */
atexit(xen_config_cleanup);
}

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@ -14,7 +14,8 @@ config XTENSA_VIRT
config XTENSA_XTFPGA
bool
default y
depends on XTENSA
depends on XTENSA && FDT
select DEVICE_TREE
select OPENCORES_ETH
select PFLASH_CFI01
select SERIAL

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@ -356,7 +356,6 @@ static void xtfpga_init(const XtfpgaBoardDesc *board, MachineState *machine)
cur_tagptr = put_tag(cur_tagptr, BP_TAG_COMMAND_LINE,
strlen(kernel_cmdline) + 1, kernel_cmdline);
}
#ifdef CONFIG_FDT
if (dtb_filename) {
int fdt_size;
void *fdt = load_device_tree(dtb_filename, &fdt_size);
@ -373,14 +372,6 @@ static void xtfpga_init(const XtfpgaBoardDesc *board, MachineState *machine)
cur_lowmem = QEMU_ALIGN_UP(cur_lowmem + fdt_size, 4 * KiB);
g_free(fdt);
}
#else
if (dtb_filename) {
error_report("could not load DTB '%s': "
"FDT support is not configured in QEMU",
dtb_filename);
exit(EXIT_FAILURE);
}
#endif
if (initrd_filename) {
BpMemInfo initrd_location = { 0 };
int initrd_size = load_ramdisk(initrd_filename, cur_lowmem,

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@ -21,6 +21,7 @@
#include "exec/memory.h"
#include "hw/boards.h"
#include "hw/i386/topology.h"
#include "hw/intc/ioapic.h"
#include "hw/isa/isa.h"
#include "qom/object.h"
@ -109,16 +110,11 @@ struct X86MachineState {
#define TYPE_X86_MACHINE MACHINE_TYPE_NAME("x86")
OBJECT_DECLARE_TYPE(X86MachineState, X86MachineClass, X86_MACHINE)
uint32_t x86_cpu_apic_id_from_index(X86MachineState *pcms,
void init_topo_info(X86CPUTopoInfo *topo_info, const X86MachineState *x86ms);
uint32_t x86_cpu_apic_id_from_index(X86MachineState *x86ms,
unsigned int cpu_index);
void x86_cpu_new(X86MachineState *pcms, int64_t apic_id, Error **errp);
void x86_cpus_init(X86MachineState *pcms, int default_cpu_version);
CpuInstanceProperties x86_cpu_index_to_props(MachineState *ms,
unsigned cpu_index);
int64_t x86_get_default_cpu_node_id(const MachineState *ms, int idx);
const CPUArchIdList *x86_possible_cpu_arch_ids(MachineState *ms);
CPUArchId *x86_find_cpu_slot(MachineState *ms, uint32_t id, int *idx);
void x86_rtc_set_cpus_count(ISADevice *rtc, uint16_t cpus_count);
void x86_cpu_pre_plug(HotplugHandler *hotplug_dev,
DeviceState *dev, Error **errp);

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@ -55,6 +55,6 @@ MC146818RtcState *mc146818_rtc_init(ISABus *bus, int base_year,
qemu_irq intercept_irq);