mirror of
https://gitlab.com/qemu-project/qemu.git
synced 2024-12-03 10:41:56 +03:00
Migration pull 2017-09-27
-----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJZy64HAAoJEAUWMx68W/3nTqwP/A5Gx4Qwkv5KKdpM0YLq//d+ OODmzl7Ni3a5Up1ETqGdLb84estrgY+5DISp73Rkt4a5tbT7+XKrhb4qD+93NnTe zynY9in4C1jGxYm7YzeOhwSeIiuLZMTCLQlGdYw7/nunIFwkItUEvAFx3AG1WCJe 2Mk0lvmg4LikruDDMdzqZaJu7h5RU5sQjA7SsyrTBdsN7tNWl3rKLYGXwgzv0uz5 n2xkUgzvvnj1Bk/Adojkn05yxA86xKD/4rhFED9fjNVSjAGHMrHIWOJ70V26Cg5w 3gJ+5mesWsH+erf0JFYv0S38SyFbmIOE39Nn13D/d0o1x89P8B8cgqbi3ADTKM77 875wuIVnZzi2vIwVdxXQ9GHQ79cpXwr2fOfQ2rjT6Ll95K+u/MQG86fQiO0eJW+0 KwQVCwwh+HmCUcCogMuxAc9+F8C8qolwCi/9QXwS2yLBElHKaWDIMyTce36cW9d7 cZaKIOeSJUGNFoaWZnXN88MRuOYbdywTl+GddVAW3+VJCTYV2oi0o5fsTfxXy5AV y7uYo/pcSj2gSZJ5GairMlB6p5iXnE8yusi1e4ZKA1x1TaSHSb6zR59lRUFr+j/L JhUCfA85v5/elGqgkYp6UhSzFDJ2ID2oSEMQTIzfVrinOXtnf2KEh33YMbUH5qyo yHVEu12uPe9rE6A0vWlu =/+LV -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/dgilbert/tags/pull-migration-20170927a' into staging Migration pull 2017-09-27 # gpg: Signature made Wed 27 Sep 2017 14:56:23 BST # gpg: using RSA key 0x0516331EBC5BFDE7 # gpg: Good signature from "Dr. David Alan Gilbert (RH2) <dgilbert@redhat.com>" # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: 45F5 C71B 4A0C B7FB 977A 9FA9 0516 331E BC5B FDE7 * remotes/dgilbert/tags/pull-migration-20170927a: migration: Route more error paths migration: Route errors up through vmstate_save migration: wire vmstate_save_state errors up to vmstate_subsection_save migration: Check field save returns migration: check pre_save return in vmstate_save_state migration: pre_save return int migration: disable auto-converge during bulk block migration Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
commit
ab16152926
@ -202,7 +202,7 @@ The functions to do that are inside a vmstate definition, and are called:
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This function is called after we load the state of one device.
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- void (*pre_save)(void *opaque);
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- int (*pre_save)(void *opaque);
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This function is called before we save the state of one device.
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@ -1143,13 +1143,15 @@ static void pxa2xx_rtc_init(Object *obj)
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sysbus_init_mmio(dev, &s->iomem);
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}
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static void pxa2xx_rtc_pre_save(void *opaque)
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static int pxa2xx_rtc_pre_save(void *opaque)
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{
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PXA2xxRTCState *s = (PXA2xxRTCState *) opaque;
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pxa2xx_rtc_hzupdate(s);
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pxa2xx_rtc_piupdate(s);
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pxa2xx_rtc_swupdate(s);
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return 0;
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}
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static int pxa2xx_rtc_post_load(void *opaque, int version_id)
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@ -406,11 +406,13 @@ static void strongarm_rtc_init(Object *obj)
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sysbus_init_mmio(dev, &s->iomem);
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}
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static void strongarm_rtc_pre_save(void *opaque)
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static int strongarm_rtc_pre_save(void *opaque)
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{
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StrongARMRTCState *s = opaque;
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strongarm_rtc_hzupdate(s);
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return 0;
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}
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static int strongarm_rtc_post_load(void *opaque, int version_id)
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@ -567,11 +567,13 @@ static int wm8750_rx(I2CSlave *i2c)
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return 0x00;
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}
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static void wm8750_pre_save(void *opaque)
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static int wm8750_pre_save(void *opaque)
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{
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WM8750State *s = opaque;
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s->rate_vmstate = s->rate - wm_rate_table;
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return 0;
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}
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static int wm8750_post_load(void *opaque, int version_id)
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@ -1101,11 +1101,13 @@ static int reconstruct_phase(FDCtrl *fdctrl)
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}
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}
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static void fdc_pre_save(void *opaque)
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static int fdc_pre_save(void *opaque)
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{
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FDCtrl *s = opaque;
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s->dor_vmstate = s->dor | GET_CUR_DRV(s);
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return 0;
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}
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static int fdc_pre_load(void *opaque)
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@ -1251,9 +1251,11 @@ static void m25p80_reset(DeviceState *d)
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reset_memory(s);
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}
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static void m25p80_pre_save(void *opaque)
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static int m25p80_pre_save(void *opaque)
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{
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flash_sync_dirty((Flash *)opaque, -1);
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return 0;
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}
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static Property m25p80_properties[] = {
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@ -325,11 +325,13 @@ static void nand_command(NANDFlashState *s)
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}
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}
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static void nand_pre_save(void *opaque)
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static int nand_pre_save(void *opaque)
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{
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NANDFlashState *s = NAND(opaque);
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s->ioaddr_vmstate = s->ioaddr - s->io;
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return 0;
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}
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static int nand_post_load(void *opaque, int version_id)
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@ -137,7 +137,7 @@ static void onenand_intr_update(OneNANDState *s)
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qemu_set_irq(s->intr, ((s->intstatus >> 15) ^ (~s->config[0] >> 6)) & 1);
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}
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static void onenand_pre_save(void *opaque)
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static int onenand_pre_save(void *opaque)
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{
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OneNANDState *s = opaque;
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if (s->current == s->otp) {
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@ -147,6 +147,8 @@ static void onenand_pre_save(void *opaque)
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} else {
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s->current_direction = 0;
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}
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return 0;
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}
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static int onenand_post_load(void *opaque, int version_id)
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@ -630,10 +630,12 @@ static void serial_event(void *opaque, int event)
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serial_receive_break(s);
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}
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static void serial_pre_save(void *opaque)
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static int serial_pre_save(void *opaque)
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{
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SerialState *s = opaque;
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s->fcr_vmstate = s->fcr;
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return 0;
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}
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static int serial_pre_load(void *opaque)
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@ -2204,7 +2204,7 @@ static void qxl_realize_secondary(PCIDevice *dev, Error **errp)
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qxl_realize_common(qxl, errp);
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}
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static void qxl_pre_save(void *opaque)
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static int qxl_pre_save(void *opaque)
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{
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PCIQXLDevice* d = opaque;
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uint8_t *ram_start = d->vga.vram_ptr;
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@ -2216,6 +2216,8 @@ static void qxl_pre_save(void *opaque)
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d->last_release_offset = (uint8_t *)d->last_release - ram_start;
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}
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assert(d->last_release_offset < d->vga.vram_size);
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return 0;
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}
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static int qxl_pre_load(void *opaque)
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@ -1050,9 +1050,7 @@ static int virtio_gpu_save(QEMUFile *f, void *opaque, size_t size,
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}
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qemu_put_be32(f, 0); /* end of list */
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vmstate_save_state(f, &vmstate_virtio_gpu_scanouts, g, NULL);
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return 0;
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return vmstate_save_state(f, &vmstate_virtio_gpu_scanouts, g, NULL);
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}
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static int virtio_gpu_load(QEMUFile *f, void *opaque, size_t size,
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@ -41,7 +41,7 @@ static const TypeInfo i2c_bus_info = {
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.instance_size = sizeof(I2CBus),
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};
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static void i2c_bus_pre_save(void *opaque)
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static int i2c_bus_pre_save(void *opaque)
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{
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I2CBus *bus = opaque;
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@ -53,6 +53,8 @@ static void i2c_bus_pre_save(void *opaque)
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bus->saved_address = I2C_BROADCAST;
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}
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}
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return 0;
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}
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static const VMStateDescription vmstate_i2c_bus = {
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@ -254,11 +254,13 @@ static const VMStateDescription kvmclock_reliable_get_clock = {
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* final pages of memory (which happens between vm_stop()
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* and pre_save()) takes max_downtime.
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*/
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static void kvmclock_pre_save(void *opaque)
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static int kvmclock_pre_save(void *opaque)
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{
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KVMClockState *s = opaque;
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kvm_update_clock(s);
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return 0;
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}
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static const VMStateDescription kvmclock_vmsd = {
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@ -2752,7 +2752,7 @@ static int ide_drive_pio_post_load(void *opaque, int version_id)
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return 0;
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}
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static void ide_drive_pio_pre_save(void *opaque)
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static int ide_drive_pio_pre_save(void *opaque)
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{
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IDEState *s = opaque;
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int idx;
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@ -2768,6 +2768,8 @@ static void ide_drive_pio_pre_save(void *opaque)
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} else {
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s->end_transfer_fn_idx = idx;
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}
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return 0;
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}
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static bool ide_drive_pio_state_needed(void *opaque)
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@ -296,7 +296,7 @@ static bool ide_bmdma_status_needed(void *opaque)
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return ((bm->status & abused_bits) != 0);
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}
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static void ide_bmdma_pre_save(void *opaque)
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static int ide_bmdma_pre_save(void *opaque)
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{
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BMDMAState *bm = opaque;
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uint8_t abused_bits = BM_MIGRATION_COMPAT_STATUS_BITS;
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@ -310,6 +310,8 @@ static void ide_bmdma_pre_save(void *opaque)
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bm->migration_retry_nsector = bm->bus->retry_nsector;
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bm->migration_compat_status =
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(bm->status & ~abused_bits) | (bm->bus->error_status & abused_bits);
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return 0;
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}
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/* This function accesses bm->bus->error_status which is loaded only after
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@ -1216,12 +1216,14 @@ static int ps2_kbd_post_load(void* opaque, int version_id)
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return 0;
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}
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static void ps2_kbd_pre_save(void *opaque)
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static int ps2_kbd_pre_save(void *opaque)
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{
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PS2KbdState *s = (PS2KbdState *)opaque;
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PS2State *ps2 = &s->common;
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ps2_common_post_load(ps2);
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return 0;
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}
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static const VMStateDescription vmstate_ps2_keyboard = {
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@ -1254,12 +1256,14 @@ static int ps2_mouse_post_load(void *opaque, int version_id)
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return 0;
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}
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static void ps2_mouse_pre_save(void *opaque)
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static int ps2_mouse_pre_save(void *opaque)
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{
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PS2MouseState *s = (PS2MouseState *)opaque;
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PS2State *ps2 = &s->common;
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ps2_common_post_load(ps2);
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return 0;
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}
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static const VMStateDescription vmstate_ps2_mouse = {
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@ -976,10 +976,12 @@ static void tsc210x_i2s_set_rate(TSC210xState *s, int in, int out)
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s->i2s_rx_rate = in;
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}
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static void tsc210x_pre_save(void *opaque)
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static int tsc210x_pre_save(void *opaque)
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{
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TSC210xState *s = (TSC210xState *) opaque;
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s->now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
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return 0;
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}
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static int tsc210x_post_load(void *opaque, int version_id)
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@ -360,7 +360,7 @@ static int apic_pre_load(void *opaque)
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return 0;
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}
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static void apic_dispatch_pre_save(void *opaque)
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static int apic_dispatch_pre_save(void *opaque)
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{
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APICCommonState *s = APIC_COMMON(opaque);
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APICCommonClass *info = APIC_COMMON_GET_CLASS(s);
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@ -368,6 +368,8 @@ static void apic_dispatch_pre_save(void *opaque)
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if (info->pre_save) {
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info->pre_save(s);
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}
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return 0;
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}
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static int apic_dispatch_post_load(void *opaque, int version_id)
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|
@ -23,7 +23,7 @@
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#include "gic_internal.h"
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#include "hw/arm/linux-boot-if.h"
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static void gic_pre_save(void *opaque)
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static int gic_pre_save(void *opaque)
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{
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GICState *s = (GICState *)opaque;
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ARMGICCommonClass *c = ARM_GIC_COMMON_GET_CLASS(s);
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@ -31,6 +31,8 @@ static void gic_pre_save(void *opaque)
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if (c->pre_save) {
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c->pre_save(s);
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}
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return 0;
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}
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static int gic_post_load(void *opaque, int version_id)
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|
@ -28,7 +28,7 @@
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#include "gicv3_internal.h"
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#include "hw/arm/linux-boot-if.h"
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static void gicv3_pre_save(void *opaque)
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static int gicv3_pre_save(void *opaque)
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{
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GICv3State *s = (GICv3State *)opaque;
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ARMGICv3CommonClass *c = ARM_GICV3_COMMON_GET_CLASS(s);
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@ -36,6 +36,8 @@ static void gicv3_pre_save(void *opaque)
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if (c->pre_save) {
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c->pre_save(s);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int gicv3_post_load(void *opaque, int version_id)
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||||
|
@ -23,7 +23,7 @@
|
||||
#include "hw/intc/arm_gicv3_its_common.h"
|
||||
#include "qemu/log.h"
|
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|
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static void gicv3_its_pre_save(void *opaque)
|
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static int gicv3_its_pre_save(void *opaque)
|
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{
|
||||
GICv3ITSState *s = (GICv3ITSState *)opaque;
|
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GICv3ITSCommonClass *c = ARM_GICV3_ITS_COMMON_GET_CLASS(s);
|
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@ -31,6 +31,8 @@ static void gicv3_its_pre_save(void *opaque)
|
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if (c->pre_save) {
|
||||
c->pre_save(s);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int gicv3_its_post_load(void *opaque, int version_id)
|
||||
|
@ -46,7 +46,7 @@ void pic_reset_common(PICCommonState *s)
|
||||
/* Note: ELCR is not reset */
|
||||
}
|
||||
|
||||
static void pic_dispatch_pre_save(void *opaque)
|
||||
static int pic_dispatch_pre_save(void *opaque)
|
||||
{
|
||||
PICCommonState *s = opaque;
|
||||
PICCommonClass *info = PIC_COMMON_GET_CLASS(s);
|
||||
@ -54,6 +54,8 @@ static void pic_dispatch_pre_save(void *opaque)
|
||||
if (info->pre_save) {
|
||||
info->pre_save(s);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int pic_dispatch_post_load(void *opaque, int version_id)
|
||||
|
@ -102,7 +102,7 @@ void ioapic_reset_common(DeviceState *dev)
|
||||
}
|
||||
}
|
||||
|
||||
static void ioapic_dispatch_pre_save(void *opaque)
|
||||
static int ioapic_dispatch_pre_save(void *opaque)
|
||||
{
|
||||
IOAPICCommonState *s = IOAPIC_COMMON(opaque);
|
||||
IOAPICCommonClass *info = IOAPIC_COMMON_GET_CLASS(s);
|
||||
@ -110,6 +110,8 @@ static void ioapic_dispatch_pre_save(void *opaque)
|
||||
if (info->pre_save) {
|
||||
info->pre_save(s);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ioapic_dispatch_post_load(void *opaque, int version_id)
|
||||
|
@ -420,7 +420,7 @@ typedef struct KVMS390FLICStateMigTmp {
|
||||
uint8_t nimm;
|
||||
} KVMS390FLICStateMigTmp;
|
||||
|
||||
static void kvm_flic_ais_pre_save(void *opaque)
|
||||
static int kvm_flic_ais_pre_save(void *opaque)
|
||||
{
|
||||
KVMS390FLICStateMigTmp *tmp = opaque;
|
||||
KVMS390FLICState *flic = tmp->parent;
|
||||
@ -433,11 +433,13 @@ static void kvm_flic_ais_pre_save(void *opaque)
|
||||
|
||||
if (ioctl(flic->fd, KVM_GET_DEVICE_ATTR, &attr)) {
|
||||
error_report("Failed to retrieve kvm flic ais states");
|
||||
return;
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
tmp->simm = ais.simm;
|
||||
tmp->nimm = ais.nimm;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int kvm_flic_ais_post_load(void *opaque, int version_id)
|
||||
|
@ -241,7 +241,7 @@ static void icp_irq(ICSState *ics, int server, int nr, uint8_t priority)
|
||||
}
|
||||
}
|
||||
|
||||
static void icp_dispatch_pre_save(void *opaque)
|
||||
static int icp_dispatch_pre_save(void *opaque)
|
||||
{
|
||||
ICPState *icp = opaque;
|
||||
ICPStateClass *info = ICP_GET_CLASS(icp);
|
||||
@ -249,6 +249,8 @@ static void icp_dispatch_pre_save(void *opaque)
|
||||
if (info->pre_save) {
|
||||
info->pre_save(icp);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int icp_dispatch_post_load(void *opaque, int version_id)
|
||||
@ -533,7 +535,7 @@ static void ics_simple_reset(void *dev)
|
||||
}
|
||||
}
|
||||
|
||||
static void ics_simple_dispatch_pre_save(void *opaque)
|
||||
static int ics_simple_dispatch_pre_save(void *opaque)
|
||||
{
|
||||
ICSState *ics = opaque;
|
||||
ICSStateClass *info = ICS_BASE_GET_CLASS(ics);
|
||||
@ -541,6 +543,8 @@ static void ics_simple_dispatch_pre_save(void *opaque)
|
||||
if (info->pre_save) {
|
||||
info->pre_save(ics);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ics_simple_dispatch_post_load(void *opaque, int version_id)
|
||||
|
@ -1343,7 +1343,7 @@ static bool is_version_1(void *opaque, int version_id)
|
||||
return version_id == 1;
|
||||
}
|
||||
|
||||
static void e1000_pre_save(void *opaque)
|
||||
static int e1000_pre_save(void *opaque)
|
||||
{
|
||||
E1000State *s = opaque;
|
||||
NetClientState *nc = qemu_get_queue(s->nic);
|
||||
@ -1361,6 +1361,8 @@ static void e1000_pre_save(void *opaque)
|
||||
if (nc->link_down && have_autoneg(s)) {
|
||||
s->phy_reg[PHY_STATUS] |= MII_SR_AUTONEG_COMPLETE;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int e1000_post_load(void *opaque, int version_id)
|
||||
|
@ -523,13 +523,15 @@ static void e1000e_qdev_reset(DeviceState *dev)
|
||||
e1000e_core_reset(&s->core);
|
||||
}
|
||||
|
||||
static void e1000e_pre_save(void *opaque)
|
||||
static int e1000e_pre_save(void *opaque)
|
||||
{
|
||||
E1000EState *s = opaque;
|
||||
|
||||
trace_e1000e_cb_pre_save();
|
||||
|
||||
e1000e_core_pre_save(&s->core);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int e1000e_post_load(void *opaque, int version_id)
|
||||
|
@ -3162,7 +3162,7 @@ static const VMStateDescription vmstate_rtl8139_hotplug_ready ={
|
||||
}
|
||||
};
|
||||
|
||||
static void rtl8139_pre_save(void *opaque)
|
||||
static int rtl8139_pre_save(void *opaque)
|
||||
{
|
||||
RTL8139State* s = opaque;
|
||||
int64_t current_time = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
|
||||
@ -3170,6 +3170,8 @@ static void rtl8139_pre_save(void *opaque)
|
||||
/* for migration to older versions */
|
||||
s->TCTR = (current_time - s->TCTR_base) / PCI_PERIOD;
|
||||
s->rtl8139_mmio_io_addr_dummy = 0;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const VMStateDescription vmstate_rtl8139 = {
|
||||
|
@ -1712,7 +1712,7 @@ struct VirtIONetMigTmp {
|
||||
* pointer and count and also validate the count.
|
||||
*/
|
||||
|
||||
static void virtio_net_tx_waiting_pre_save(void *opaque)
|
||||
static int virtio_net_tx_waiting_pre_save(void *opaque)
|
||||
{
|
||||
struct VirtIONetMigTmp *tmp = opaque;
|
||||
|
||||
@ -1721,6 +1721,8 @@ static void virtio_net_tx_waiting_pre_save(void *opaque)
|
||||
if (tmp->parent->curr_queues == 0) {
|
||||
tmp->curr_queues_1 = 0;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int virtio_net_tx_waiting_pre_load(void *opaque)
|
||||
@ -1768,11 +1770,13 @@ static int virtio_net_ufo_post_load(void *opaque, int version_id)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void virtio_net_ufo_pre_save(void *opaque)
|
||||
static int virtio_net_ufo_pre_save(void *opaque)
|
||||
{
|
||||
struct VirtIONetMigTmp *tmp = opaque;
|
||||
|
||||
tmp->has_ufo = tmp->parent->has_ufo;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const VMStateDescription vmstate_virtio_net_has_ufo = {
|
||||
@ -1800,11 +1804,13 @@ static int virtio_net_vnet_post_load(void *opaque, int version_id)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void virtio_net_vnet_pre_save(void *opaque)
|
||||
static int virtio_net_vnet_pre_save(void *opaque)
|
||||
{
|
||||
struct VirtIONetMigTmp *tmp = opaque;
|
||||
|
||||
tmp->has_vnet_hdr = tmp->parent->has_vnet_hdr;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const VMStateDescription vmstate_virtio_net_has_vnet = {
|
||||
@ -2079,13 +2085,15 @@ static void virtio_net_instance_init(Object *obj)
|
||||
DEVICE(n), NULL);
|
||||
}
|
||||
|
||||
static void virtio_net_pre_save(void *opaque)
|
||||
static int virtio_net_pre_save(void *opaque)
|
||||
{
|
||||
VirtIONet *n = opaque;
|
||||
|
||||
/* At this point, backend must be stopped, otherwise
|
||||
* it might keep writing to memory. */
|
||||
assert(!n->vhost_started);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const VMStateDescription vmstate_virtio_net = {
|
||||
|
@ -2388,11 +2388,13 @@ static int vmxnet3_mcast_list_pre_load(void *opaque)
|
||||
}
|
||||
|
||||
|
||||
static void vmxnet3_pre_save(void *opaque)
|
||||
static int vmxnet3_pre_save(void *opaque)
|
||||
{
|
||||
VMXNET3State *s = opaque;
|
||||
|
||||
s->mcast_list_buff_size = s->mcast_list_len * sizeof(MACAddr);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const VMStateDescription vmxstate_vmxnet3_mcast_list = {
|
||||
|
@ -579,7 +579,7 @@ static int piix3_post_load(void *opaque, int version_id)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void piix3_pre_save(void *opaque)
|
||||
static int piix3_pre_save(void *opaque)
|
||||
{
|
||||
int i;
|
||||
PIIX3State *piix3 = opaque;
|
||||
@ -588,6 +588,8 @@ static void piix3_pre_save(void *opaque)
|
||||
piix3->pci_irq_levels_vmstate[i] =
|
||||
pci_bus_get_irq_level(piix3->dev.bus, i);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static bool piix3_rcr_needed(void *opaque)
|
||||
|
@ -937,11 +937,13 @@ void cpu_ppc_clock_vm_state_change(void *opaque, int running,
|
||||
* final pages of memory (which happens between vm_stop()
|
||||
* and pre_save()) takes max_downtime.
|
||||
*/
|
||||
static void timebase_pre_save(void *opaque)
|
||||
static int timebase_pre_save(void *opaque)
|
||||
{
|
||||
PPCTimebase *tb = opaque;
|
||||
|
||||
timebase_save(tb);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
const VMStateDescription vmstate_ppc_timebase = {
|
||||
|
@ -140,7 +140,7 @@ static IOMMUTLBEntry spapr_tce_translate_iommu(IOMMUMemoryRegion *iommu,
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void spapr_tce_table_pre_save(void *opaque)
|
||||
static int spapr_tce_table_pre_save(void *opaque)
|
||||
{
|
||||
sPAPRTCETable *tcet = SPAPR_TCE_TABLE(opaque);
|
||||
|
||||
@ -149,6 +149,8 @@ static void spapr_tce_table_pre_save(void *opaque)
|
||||
|
||||
trace_spapr_iommu_pre_save(tcet->liobn, tcet->mig_nb_table,
|
||||
tcet->bus_offset, tcet->page_shift);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static uint64_t spapr_tce_get_min_page_size(IOMMUMemoryRegion *iommu)
|
||||
|
@ -1798,7 +1798,7 @@ static const VMStateDescription vmstate_spapr_pci_msi = {
|
||||
},
|
||||
};
|
||||
|
||||
static void spapr_pci_pre_save(void *opaque)
|
||||
static int spapr_pci_pre_save(void *opaque)
|
||||
{
|
||||
sPAPRPHBState *sphb = opaque;
|
||||
GHashTableIter iter;
|
||||
@ -1823,7 +1823,7 @@ static void spapr_pci_pre_save(void *opaque)
|
||||
sphb->msi_devs = NULL;
|
||||
sphb->msi_devs_num = g_hash_table_size(sphb->msi);
|
||||
if (!sphb->msi_devs_num) {
|
||||
return;
|
||||
return 0;
|
||||
}
|
||||
sphb->msi_devs = g_malloc(sphb->msi_devs_num * sizeof(spapr_pci_msi_mig));
|
||||
|
||||
@ -1832,6 +1832,8 @@ static void spapr_pci_pre_save(void *opaque)
|
||||
sphb->msi_devs[i].key = *(uint32_t *) key;
|
||||
sphb->msi_devs[i].value = *(spapr_pci_msi *) value;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int spapr_pci_post_load(void *opaque, int version_id)
|
||||
|
@ -196,7 +196,7 @@ static const VMStateDescription vmstate_schdev_orb = {
|
||||
};
|
||||
|
||||
static int subch_dev_post_load(void *opaque, int version_id);
|
||||
static void subch_dev_pre_save(void *opaque);
|
||||
static int subch_dev_pre_save(void *opaque);
|
||||
|
||||
const char err_hint_devno[] = "Devno mismatch, tried to load wrong section!"
|
||||
" Likely reason: some sequences of plug and unplug can break"
|
||||
@ -249,7 +249,7 @@ static int post_load_ind_addr(void *opaque, int version_id)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void pre_save_ind_addr(void *opaque)
|
||||
static int pre_save_ind_addr(void *opaque)
|
||||
{
|
||||
IndAddrPtrTmp *ptmp = opaque;
|
||||
IndAddr *ind_addr = *(ptmp->parent);
|
||||
@ -261,6 +261,8 @@ static void pre_save_ind_addr(void *opaque)
|
||||
ptmp->len = 0;
|
||||
ptmp->addr = 0L;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
const VMStateDescription vmstate_ind_addr_tmp = {
|
||||
@ -358,12 +360,14 @@ static ChannelSubSys channel_subsys = {
|
||||
QTAILQ_HEAD_INITIALIZER(channel_subsys.indicator_addresses),
|
||||
};
|
||||
|
||||
static void subch_dev_pre_save(void *opaque)
|
||||
static int subch_dev_pre_save(void *opaque)
|
||||
{
|
||||
SubchDev *s = opaque;
|
||||
|
||||
/* Prepare remote_schid for save */
|
||||
s->migrated_schid = s->schid;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int subch_dev_post_load(void *opaque, int version_id)
|
||||
|
@ -62,13 +62,15 @@ typedef struct VirtioCcwDeviceTmp {
|
||||
uint16_t config_vector;
|
||||
} VirtioCcwDeviceTmp;
|
||||
|
||||
static void virtio_ccw_dev_tmp_pre_save(void *opaque)
|
||||
static int virtio_ccw_dev_tmp_pre_save(void *opaque)
|
||||
{
|
||||
VirtioCcwDeviceTmp *tmp = opaque;
|
||||
VirtioCcwDevice *dev = tmp->parent;
|
||||
VirtIODevice *vdev = virtio_bus_get_device(&dev->bus);
|
||||
|
||||
tmp->config_vector = vdev->config_vector;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int virtio_ccw_dev_tmp_post_load(void *opaque, int version_id)
|
||||
|
@ -2083,7 +2083,7 @@ static void lsi_scsi_reset(DeviceState *dev)
|
||||
lsi_soft_reset(s);
|
||||
}
|
||||
|
||||
static void lsi_pre_save(void *opaque)
|
||||
static int lsi_pre_save(void *opaque)
|
||||
{
|
||||
LSIState *s = opaque;
|
||||
|
||||
@ -2092,6 +2092,8 @@ static void lsi_pre_save(void *opaque)
|
||||
assert(s->current->dma_len == 0);
|
||||
}
|
||||
assert(QTAILQ_EMPTY(&s->queue));
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const VMStateDescription vmstate_lsi_scsi = {
|
||||
|
@ -1167,7 +1167,7 @@ pvscsi_reset(DeviceState *dev)
|
||||
pvscsi_reset_adapter(s);
|
||||
}
|
||||
|
||||
static void
|
||||
static int
|
||||
pvscsi_pre_save(void *opaque)
|
||||
{
|
||||
PVSCSIState *s = (PVSCSIState *) opaque;
|
||||
@ -1176,6 +1176,8 @@ pvscsi_pre_save(void *opaque)
|
||||
|
||||
assert(QTAILQ_EMPTY(&s->pending_queue));
|
||||
assert(QTAILQ_EMPTY(&s->completion_queue));
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
|
@ -421,9 +421,11 @@ static void cadence_ttc_init(Object *obj)
|
||||
sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->iomem);
|
||||
}
|
||||
|
||||
static void cadence_timer_pre_save(void *opaque)
|
||||
static int cadence_timer_pre_save(void *opaque)
|
||||
{
|
||||
cadence_timer_sync((CadenceTimerState *)opaque);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int cadence_timer_post_load(void *opaque, int version_id)
|
||||
|
@ -216,12 +216,14 @@ static void update_irq(struct HPETTimer *timer, int set)
|
||||
}
|
||||
}
|
||||
|
||||
static void hpet_pre_save(void *opaque)
|
||||
static int hpet_pre_save(void *opaque)
|
||||
{
|
||||
HPETState *s = opaque;
|
||||
|
||||
/* save current counter value */
|
||||
s->hpet_counter = hpet_get_ticks(s);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int hpet_pre_load(void *opaque)
|
||||
|
@ -237,7 +237,7 @@ static int pit_load_old(QEMUFile *f, void *opaque, int version_id)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void pit_dispatch_pre_save(void *opaque)
|
||||
static int pit_dispatch_pre_save(void *opaque)
|
||||
{
|
||||
PITCommonState *s = opaque;
|
||||
PITCommonClass *c = PIT_COMMON_GET_CLASS(s);
|
||||
@ -245,6 +245,8 @@ static void pit_dispatch_pre_save(void *opaque)
|
||||
if (c->pre_save) {
|
||||
c->pre_save(s);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int pit_dispatch_post_load(void *opaque, int version_id)
|
||||
|
@ -795,11 +795,13 @@ static void rtc_set_date_from_host(ISADevice *dev)
|
||||
rtc_set_cmos(s, &tm);
|
||||
}
|
||||
|
||||
static void rtc_pre_save(void *opaque)
|
||||
static int rtc_pre_save(void *opaque)
|
||||
{
|
||||
RTCState *s = opaque;
|
||||
|
||||
rtc_update_time(s);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int rtc_post_load(void *opaque, int version_id)
|
||||
|
@ -211,7 +211,7 @@ static void pl031_init(Object *obj)
|
||||
s->timer = timer_new_ns(rtc_clock, pl031_interrupt, s);
|
||||
}
|
||||
|
||||
static void pl031_pre_save(void *opaque)
|
||||
static int pl031_pre_save(void *opaque)
|
||||
{
|
||||
PL031State *s = opaque;
|
||||
|
||||
@ -219,6 +219,8 @@ static void pl031_pre_save(void *opaque)
|
||||
* store the base time relative to the QEMU_CLOCK_VIRTUAL for backwards-compatibility. */
|
||||
int64_t delta = qemu_clock_get_ns(rtc_clock) - qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
|
||||
s->tick_offset_vmstate = s->tick_offset + delta / NANOSECONDS_PER_SECOND;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int pl031_post_load(void *opaque, int version_id)
|
||||
|
@ -791,11 +791,13 @@ static const VMStateDescription vmstate_menelaus_tm = {
|
||||
}
|
||||
};
|
||||
|
||||
static void menelaus_pre_save(void *opaque)
|
||||
static int menelaus_pre_save(void *opaque)
|
||||
{
|
||||
MenelausState *s = opaque;
|
||||
/* Should be <= 1000 */
|
||||
s->rtc_next_vmstate = s->rtc.next - qemu_clock_get_ms(rtc_clock);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int menelaus_post_load(void *opaque, int version_id)
|
||||
|
@ -1374,7 +1374,7 @@ static int ccid_post_load(void *opaque, int version_id)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void ccid_pre_save(void *opaque)
|
||||
static int ccid_pre_save(void *opaque)
|
||||
{
|
||||
USBCCIDState *s = opaque;
|
||||
|
||||
@ -1386,6 +1386,8 @@ static void ccid_pre_save(void *opaque)
|
||||
*/
|
||||
s->migration_state = MIGRATION_MIGRATED;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static VMStateDescription bulk_in_vmstate = {
|
||||
|
@ -2381,7 +2381,7 @@ static USBBusOps ehci_bus_ops_standalone = {
|
||||
.wakeup_endpoint = ehci_wakeup_endpoint,
|
||||
};
|
||||
|
||||
static void usb_ehci_pre_save(void *opaque)
|
||||
static int usb_ehci_pre_save(void *opaque)
|
||||
{
|
||||
EHCIState *ehci = opaque;
|
||||
uint32_t new_frindex;
|
||||
@ -2390,6 +2390,8 @@ static void usb_ehci_pre_save(void *opaque)
|
||||
new_frindex = ehci->frindex & ~7;
|
||||
ehci->last_run_ns -= (ehci->frindex - new_frindex) * UFRAME_TIMER_NS;
|
||||
ehci->frindex = new_frindex;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int usb_ehci_post_load(void *opaque, int version_id)
|
||||
|
@ -2111,11 +2111,13 @@ static void usbredir_buffered_bulk_packet(void *priv, uint64_t id,
|
||||
* Migration code
|
||||
*/
|
||||
|
||||
static void usbredir_pre_save(void *priv)
|
||||
static int usbredir_pre_save(void *priv)
|
||||
{
|
||||
USBRedirDevice *dev = priv;
|
||||
|
||||
usbredir_fill_already_in_flight(dev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int usbredir_post_load(void *priv, int version_id)
|
||||
|
@ -254,13 +254,15 @@ static void vhost_vsock_post_load_timer_cb(void *opaque)
|
||||
vhost_vsock_send_transport_reset(vsock);
|
||||
}
|
||||
|
||||
static void vhost_vsock_pre_save(void *opaque)
|
||||
static int vhost_vsock_pre_save(void *opaque)
|
||||
{
|
||||
VHostVSock *vsock = opaque;
|
||||
|
||||
/* At this point, backend must be stopped, otherwise
|
||||
* it might keep writing to memory. */
|
||||
assert(!vsock->vhost_dev.started);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int vhost_vsock_post_load(void *opaque, int version_id)
|
||||
|
@ -1897,7 +1897,7 @@ static const VMStateDescription vmstate_virtio = {
|
||||
}
|
||||
};
|
||||
|
||||
void virtio_save(VirtIODevice *vdev, QEMUFile *f)
|
||||
int virtio_save(VirtIODevice *vdev, QEMUFile *f)
|
||||
{
|
||||
BusState *qbus = qdev_get_parent_bus(DEVICE(vdev));
|
||||
VirtioBusClass *k = VIRTIO_BUS_GET_CLASS(qbus);
|
||||
@ -1947,20 +1947,21 @@ void virtio_save(VirtIODevice *vdev, QEMUFile *f)
|
||||
}
|
||||
|
||||
if (vdc->vmsd) {
|
||||
vmstate_save_state(f, vdc->vmsd, vdev, NULL);
|
||||
int ret = vmstate_save_state(f, vdc->vmsd, vdev, NULL);
|
||||
if (ret) {
|
||||
return ret;
|
||||
}
|
||||
}
|
||||
|
||||
/* Subsections */
|
||||
vmstate_save_state(f, &vmstate_virtio, vdev, NULL);
|
||||
return vmstate_save_state(f, &vmstate_virtio, vdev, NULL);
|
||||
}
|
||||
|
||||
/* A wrapper for use as a VMState .put function */
|
||||
static int virtio_device_put(QEMUFile *f, void *opaque, size_t size,
|
||||
VMStateField *field, QJSON *vmdesc)
|
||||
{
|
||||
virtio_save(VIRTIO_DEVICE(opaque), f);
|
||||
|
||||
return 0;
|
||||
return virtio_save(VIRTIO_DEVICE(opaque), f);
|
||||
}
|
||||
|
||||
/* A wrapper for use as a VMState .get function */
|
||||
|
@ -188,7 +188,7 @@ void virtqueue_get_avail_bytes(VirtQueue *vq, unsigned int *in_bytes,
|
||||
void virtio_notify_irqfd(VirtIODevice *vdev, VirtQueue *vq);
|
||||
void virtio_notify(VirtIODevice *vdev, VirtQueue *vq);
|
||||
|
||||
void virtio_save(VirtIODevice *vdev, QEMUFile *f);
|
||||
int virtio_save(VirtIODevice *vdev, QEMUFile *f);
|
||||
|
||||
extern const VMStateInfo virtio_vmstate_info;
|
||||
|
||||
|
@ -179,7 +179,7 @@ struct VMStateDescription {
|
||||
LoadStateHandler *load_state_old;
|
||||
int (*pre_load)(void *opaque);
|
||||
int (*post_load)(void *opaque, int version_id);
|
||||
void (*pre_save)(void *opaque);
|
||||
int (*pre_save)(void *opaque);
|
||||
bool (*needed)(void *opaque);
|
||||
VMStateField *fields;
|
||||
const VMStateDescription **subsections;
|
||||
@ -994,8 +994,8 @@ extern const VMStateInfo vmstate_info_qtailq;
|
||||
|
||||
int vmstate_load_state(QEMUFile *f, const VMStateDescription *vmsd,
|
||||
void *opaque, int version_id);
|
||||
void vmstate_save_state(QEMUFile *f, const VMStateDescription *vmsd,
|
||||
void *opaque, QJSON *vmdesc);
|
||||
int vmstate_save_state(QEMUFile *f, const VMStateDescription *vmsd,
|
||||
void *opaque, QJSON *vmdesc);
|
||||
|
||||
bool vmstate_save_needed(const VMStateDescription *vmsd, void *opaque);
|
||||
|
||||
|
@ -161,6 +161,11 @@ int blk_mig_active(void)
|
||||
return !QSIMPLEQ_EMPTY(&block_mig_state.bmds_list);
|
||||
}
|
||||
|
||||
int blk_mig_bulk_active(void)
|
||||
{
|
||||
return blk_mig_active() && !block_mig_state.bulk_completed;
|
||||
}
|
||||
|
||||
uint64_t blk_mig_bytes_transferred(void)
|
||||
{
|
||||
BlkMigDevState *bmds;
|
||||
|
@ -16,6 +16,7 @@
|
||||
|
||||
#ifdef CONFIG_LIVE_BLOCK_MIGRATION
|
||||
int blk_mig_active(void);
|
||||
int blk_mig_bulk_active(void);
|
||||
uint64_t blk_mig_bytes_transferred(void);
|
||||
uint64_t blk_mig_bytes_remaining(void);
|
||||
uint64_t blk_mig_bytes_total(void);
|
||||
@ -25,6 +26,12 @@ static inline int blk_mig_active(void)
|
||||
{
|
||||
return false;
|
||||
}
|
||||
|
||||
static inline int blk_mig_bulk_active(void)
|
||||
{
|
||||
return false;
|
||||
}
|
||||
|
||||
static inline uint64_t blk_mig_bytes_transferred(void)
|
||||
{
|
||||
return 0;
|
||||
|