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https://github.com/systemd/systemd-stable.git
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basic/architectures: sort by name and remove duplicates
C.f. 086df29f35.
This commit is contained in:
Zbigniew Jędrzejewski-Szmek
Lennart Poettering
parent
7ab3c86d63
commit
91ee7c5ebd
@ -9,114 +9,111 @@
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int uname_architecture(void) {
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int uname_architecture(void) {
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/* Return a sanitized enum identifying the architecture we are
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/* Return a sanitized enum identifying the architecture we are running on. This
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* running on. This is based on uname(), and the user may
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* is based on uname(), and the user may hence control what this returns by using
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* hence control what this returns by using
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* personality(). This puts the user in control on systems that can run binaries
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* personality(). This puts the user in control on systems
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* of multiple architectures.
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* that can run binaries of multiple architectures.
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*
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*
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* We do not translate the string returned by uname()
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* We do not translate the string returned by uname() 1:1. Instead we try to
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* 1:1. Instead we try to clean it up and break down the
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* clean it up and break down the confusion on x86 and arm in particular.
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* confusion on x86 and arm in particular.
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*
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*
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* We do not try to distinguish CPUs not CPU features, but
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* We try to distinguish CPUs, not CPU features, i.e. actual architectures that
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* actual architectures, i.e. that have genuinely different
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* have genuinely different code. */
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* code. */
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static const struct {
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static const struct {
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const char *machine;
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const char *machine;
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int arch;
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int arch;
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} arch_map[] = {
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} arch_map[] = {
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#if defined(__x86_64__) || defined(__i386__)
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#if defined(__aarch64__) || defined(__arm__)
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{ "aarch64", ARCHITECTURE_ARM64 },
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{ "aarch64_be", ARCHITECTURE_ARM64_BE },
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{ "armv8l", ARCHITECTURE_ARM },
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{ "armv8b", ARCHITECTURE_ARM_BE },
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{ "armv7ml", ARCHITECTURE_ARM },
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{ "armv7mb", ARCHITECTURE_ARM_BE },
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{ "armv7l", ARCHITECTURE_ARM },
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{ "armv7b", ARCHITECTURE_ARM_BE },
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{ "armv6l", ARCHITECTURE_ARM },
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{ "armv6b", ARCHITECTURE_ARM_BE },
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{ "armv5tl", ARCHITECTURE_ARM },
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{ "armv5tel", ARCHITECTURE_ARM },
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{ "armv5tejl", ARCHITECTURE_ARM },
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{ "armv5tejb", ARCHITECTURE_ARM_BE },
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{ "armv5teb", ARCHITECTURE_ARM_BE },
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{ "armv5tb", ARCHITECTURE_ARM_BE },
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{ "armv4tl", ARCHITECTURE_ARM },
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{ "armv4tb", ARCHITECTURE_ARM_BE },
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{ "armv4l", ARCHITECTURE_ARM },
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{ "armv4b", ARCHITECTURE_ARM_BE },
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#elif defined(__alpha__)
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{ "alpha" , ARCHITECTURE_ALPHA },
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#elif defined(__arc__)
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{ "arc", ARCHITECTURE_ARC },
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{ "arceb", ARCHITECTURE_ARC_BE },
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#elif defined(__cris__)
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{ "crisv32", ARCHITECTURE_CRIS },
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#elif defined(__i386__) || defined(__x86_64__)
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{ "x86_64", ARCHITECTURE_X86_64 },
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{ "x86_64", ARCHITECTURE_X86_64 },
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{ "i686", ARCHITECTURE_X86 },
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{ "i686", ARCHITECTURE_X86 },
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{ "i586", ARCHITECTURE_X86 },
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{ "i586", ARCHITECTURE_X86 },
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{ "i486", ARCHITECTURE_X86 },
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{ "i486", ARCHITECTURE_X86 },
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{ "i386", ARCHITECTURE_X86 },
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{ "i386", ARCHITECTURE_X86 },
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#elif defined(__powerpc__) || defined(__powerpc64__)
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{ "ppc64", ARCHITECTURE_PPC64 },
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{ "ppc64le", ARCHITECTURE_PPC64_LE },
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{ "ppc", ARCHITECTURE_PPC },
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{ "ppcle", ARCHITECTURE_PPC_LE },
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#elif defined(__ia64__)
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#elif defined(__ia64__)
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{ "ia64", ARCHITECTURE_IA64 },
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{ "ia64", ARCHITECTURE_IA64 },
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#elif defined(__hppa__) || defined(__hppa64__)
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#elif defined(__hppa__) || defined(__hppa64__)
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{ "parisc64", ARCHITECTURE_PARISC64 },
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{ "parisc64", ARCHITECTURE_PARISC64 },
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{ "parisc", ARCHITECTURE_PARISC },
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{ "parisc", ARCHITECTURE_PARISC },
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#elif defined(__s390__) || defined(__s390x__)
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{ "s390x", ARCHITECTURE_S390X },
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#elif defined(__m68k__)
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{ "s390", ARCHITECTURE_S390 },
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{ "m68k", ARCHITECTURE_M68K },
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#elif defined(__sparc__)
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{ "sparc64", ARCHITECTURE_SPARC64 },
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{ "sparc", ARCHITECTURE_SPARC },
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#elif defined(__mips__) || defined(__mips64__)
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#elif defined(__mips__) || defined(__mips64__)
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{ "mips64", ARCHITECTURE_MIPS64 },
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{ "mips64", ARCHITECTURE_MIPS64 },
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{ "mips", ARCHITECTURE_MIPS },
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{ "mips", ARCHITECTURE_MIPS },
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#elif defined(__alpha__)
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{ "alpha" , ARCHITECTURE_ALPHA },
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#elif defined(__arm__) || defined(__aarch64__)
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{ "aarch64", ARCHITECTURE_ARM64 },
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{ "aarch64_be", ARCHITECTURE_ARM64_BE },
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{ "armv4l", ARCHITECTURE_ARM },
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{ "armv4b", ARCHITECTURE_ARM_BE },
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{ "armv4tl", ARCHITECTURE_ARM },
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{ "armv4tb", ARCHITECTURE_ARM_BE },
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{ "armv5tl", ARCHITECTURE_ARM },
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{ "armv5tb", ARCHITECTURE_ARM_BE },
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{ "armv5tel", ARCHITECTURE_ARM },
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{ "armv5teb" , ARCHITECTURE_ARM_BE },
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{ "armv5tejl", ARCHITECTURE_ARM },
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{ "armv5tejb", ARCHITECTURE_ARM_BE },
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{ "armv6l", ARCHITECTURE_ARM },
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{ "armv6b", ARCHITECTURE_ARM_BE },
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{ "armv7l", ARCHITECTURE_ARM },
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{ "armv7b", ARCHITECTURE_ARM_BE },
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{ "armv7ml", ARCHITECTURE_ARM },
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{ "armv7mb", ARCHITECTURE_ARM_BE },
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{ "armv4l", ARCHITECTURE_ARM },
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{ "armv4b", ARCHITECTURE_ARM_BE },
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{ "armv4tl", ARCHITECTURE_ARM },
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{ "armv4tb", ARCHITECTURE_ARM_BE },
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{ "armv5tl", ARCHITECTURE_ARM },
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{ "armv5tb", ARCHITECTURE_ARM_BE },
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{ "armv5tel", ARCHITECTURE_ARM },
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{ "armv5teb", ARCHITECTURE_ARM_BE },
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{ "armv5tejl", ARCHITECTURE_ARM },
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{ "armv5tejb", ARCHITECTURE_ARM_BE },
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{ "armv6l", ARCHITECTURE_ARM },
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{ "armv6b", ARCHITECTURE_ARM_BE },
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{ "armv7l", ARCHITECTURE_ARM },
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{ "armv7b", ARCHITECTURE_ARM_BE },
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{ "armv7ml", ARCHITECTURE_ARM },
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{ "armv7mb", ARCHITECTURE_ARM_BE },
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{ "armv8l", ARCHITECTURE_ARM },
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{ "armv8b", ARCHITECTURE_ARM_BE },
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#elif defined(__sh__) || defined(__sh64__)
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{ "sh5", ARCHITECTURE_SH64 },
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{ "sh2", ARCHITECTURE_SH },
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{ "sh2a", ARCHITECTURE_SH },
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{ "sh3", ARCHITECTURE_SH },
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{ "sh4", ARCHITECTURE_SH },
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{ "sh4a", ARCHITECTURE_SH },
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#elif defined(__m68k__)
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{ "m68k", ARCHITECTURE_M68K },
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#elif defined(__tilegx__)
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{ "tilegx", ARCHITECTURE_TILEGX },
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#elif defined(__cris__)
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{ "crisv32", ARCHITECTURE_CRIS },
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#elif defined(__nios2__)
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#elif defined(__nios2__)
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{ "nios2", ARCHITECTURE_NIOS2 },
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{ "nios2", ARCHITECTURE_NIOS2 },
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#elif defined(__powerpc__) || defined(__powerpc64__)
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{ "ppc64le", ARCHITECTURE_PPC64_LE },
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{ "ppc64", ARCHITECTURE_PPC64 },
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{ "ppcle", ARCHITECTURE_PPC_LE },
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{ "ppc", ARCHITECTURE_PPC },
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#elif defined(__riscv)
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#elif defined(__riscv)
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{ "riscv32", ARCHITECTURE_RISCV32 },
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{ "riscv64", ARCHITECTURE_RISCV64 },
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{ "riscv64", ARCHITECTURE_RISCV64 },
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{ "riscv32", ARCHITECTURE_RISCV32 },
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# if __SIZEOF_POINTER__ == 4
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# if __SIZEOF_POINTER__ == 4
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{ "riscv", ARCHITECTURE_RISCV32 },
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{ "riscv", ARCHITECTURE_RISCV32 },
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# elif __SIZEOF_POINTER__ == 8
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# elif __SIZEOF_POINTER__ == 8
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{ "riscv", ARCHITECTURE_RISCV64 },
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{ "riscv", ARCHITECTURE_RISCV64 },
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# endif
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# endif
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#elif defined(__arc__)
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{ "arc", ARCHITECTURE_ARC },
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#elif defined(__s390__) || defined(__s390x__)
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{ "arceb", ARCHITECTURE_ARC_BE },
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{ "s390x", ARCHITECTURE_S390X },
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{ "s390", ARCHITECTURE_S390 },
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#elif defined(__sh__) || defined(__sh64__)
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{ "sh5", ARCHITECTURE_SH64 },
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{ "sh4a", ARCHITECTURE_SH },
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{ "sh4", ARCHITECTURE_SH },
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{ "sh3", ARCHITECTURE_SH },
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{ "sh2a", ARCHITECTURE_SH },
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{ "sh2", ARCHITECTURE_SH },
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#elif defined(__sparc__)
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{ "sparc64", ARCHITECTURE_SPARC64 },
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{ "sparc", ARCHITECTURE_SPARC },
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#elif defined(__tilegx__)
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{ "tilegx", ARCHITECTURE_TILEGX },
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#else
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#else
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# error "Please register your architecture here!"
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# error "Please register your architecture here!"
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#endif
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#endif
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