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Merge pull request #27256 from medhefgo/boot-rdtsc
boot: Improve timer frequency detection
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commit
766c30a3b5
@ -4,59 +4,91 @@
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#include "util.h"
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#include "vmm.h"
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#ifdef __x86_64__
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static uint64_t ticks_read(void) {
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uint64_t a, d;
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#if defined(__i386__) || defined(__x86_64__)
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# include <cpuid.h>
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static uint64_t ticks_read_arch(void) {
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/* The TSC might or might not be virtualized in VMs (and thus might not be accurate or start at zero
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* at boot), depending on hypervisor and CPU functionality. If it's not virtualized it's not useful
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* for keeping time, hence don't attempt to use it. */
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if (in_hypervisor())
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return 0;
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__asm__ volatile ("rdtsc" : "=a" (a), "=d" (d));
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return (d << 32) | a;
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return __builtin_ia32_rdtsc();
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}
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#elif defined(__i386__)
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static uint64_t ticks_read(void) {
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uint64_t val;
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if (in_hypervisor())
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static uint64_t ticks_freq_arch(void) {
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/* Detect TSC frequency from CPUID information if available. */
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unsigned max_leaf, ebx, ecx, edx;
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if (__get_cpuid(0, &max_leaf, &ebx, &ecx, &edx) == 0)
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return 0;
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__asm__ volatile ("rdtsc" : "=A" (val));
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return val;
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/* Leaf 0x15 is Intel only. */
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if (max_leaf < 0x15 || ebx != signature_INTEL_ebx || ecx != signature_INTEL_ecx ||
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edx != signature_INTEL_edx)
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return 0;
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unsigned denominator, numerator, crystal_hz;
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__cpuid(0x15, denominator, numerator, crystal_hz, edx);
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if (denominator == 0 || numerator == 0)
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return 0;
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uint64_t freq = crystal_hz;
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if (crystal_hz == 0) {
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/* If the crystal frquency is not available, try to deduce it from
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* the processor frequency leaf if available. */
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if (max_leaf < 0x16)
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return 0;
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unsigned core_mhz;
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__cpuid(0x16, core_mhz, ebx, ecx, edx);
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freq = core_mhz * 1000ULL * 1000ULL * denominator / numerator;
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}
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return freq * numerator / denominator;
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}
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#elif defined(__aarch64__)
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static uint64_t ticks_read(void) {
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static uint64_t ticks_read_arch(void) {
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uint64_t val;
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asm volatile("mrs %0, cntvct_el0" : "=r"(val));
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return val;
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}
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#else
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static uint64_t ticks_read(void) {
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return 0;
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}
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#endif
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#if defined(__aarch64__)
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static uint64_t ticks_freq(void) {
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static uint64_t ticks_freq_arch(void) {
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uint64_t freq;
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asm volatile("mrs %0, cntfrq_el0" : "=r"(freq));
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return freq;
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}
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#else
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/* count TSC ticks during a millisecond delay */
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static uint64_t ticks_read_arch(void) {
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return 0;
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}
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static uint64_t ticks_freq_arch(void) {
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return 0;
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}
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#endif
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static uint64_t ticks_freq(void) {
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uint64_t ticks_start, ticks_end;
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static uint64_t cache = 0;
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if (cache != 0)
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return cache;
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ticks_start = ticks_read();
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cache = ticks_freq_arch();
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if (cache != 0)
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return cache;
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/* As a fallback, count ticks during a millisecond delay. */
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uint64_t ticks_start = ticks_read_arch();
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BS->Stall(1000);
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ticks_end = ticks_read();
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uint64_t ticks_end = ticks_read_arch();
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if (ticks_end < ticks_start) /* Check for an overflow (which is not that unlikely, given on some
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* archs the value is 32bit) */
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@ -65,16 +97,13 @@ static uint64_t ticks_freq(void) {
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cache = (ticks_end - ticks_start) * 1000UL;
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return cache;
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}
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#endif
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uint64_t time_usec(void) {
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uint64_t ticks, freq;
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ticks = ticks_read();
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uint64_t ticks = ticks_read_arch();
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if (ticks == 0)
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return 0;
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freq = ticks_freq();
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uint64_t freq = ticks_freq();
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if (freq == 0)
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return 0;
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