Backported defaultMachine changes from rpm-4_4 branch.
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b796bc7aa9
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ff10df025a
210
lib/rpmrc.c
210
lib/rpmrc.c
@ -870,22 +870,19 @@ exit:
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/*
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* Generic CPUID function
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*/
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static inline void cpuid(unsigned int op, int *eax, int *ebx, int *ecx, int *edx)
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static inline void cpuid(unsigned int op, unsigned int *eax, unsigned int *ebx, unsigned int *ecx, unsigned int *edx)
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/*@modifies *eax, *ebx, *ecx, *edx @*/
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{
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#ifdef __LCLINT__
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*eax = *ebx = *ecx = *edx = 0;
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#endif
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#ifdef PIC
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__asm__("pushl %%ebx; cpuid; movl %%ebx,%1; popl %%ebx"
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: "=a"(*eax), "=g"(*ebx), "=&c"(*ecx), "=&d"(*edx)
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: "a" (op));
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#else
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__asm__("cpuid"
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: "=a" (*eax), "=b" (*ebx), "=c" (*ecx), "=d" (*edx)
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: "a" (op));
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#endif
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asm volatile (
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"pushl %%ebx \n"
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"cpuid \n"
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"movl %%ebx, %%esi \n"
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"popl %%ebx \n"
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: "=a" (*eax), "=S" (*ebx), "=c" (*ecx), "=d" (*edx)
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: "a" (op));
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}
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/*
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@ -894,15 +891,8 @@ static inline void cpuid(unsigned int op, int *eax, int *ebx, int *ecx, int *edx
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static inline unsigned int cpuid_eax(unsigned int op)
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/*@*/
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{
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unsigned int val;
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#ifdef PIC
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__asm__("pushl %%ebx; cpuid; popl %%ebx"
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: "=a" (val) : "a" (op) : "ecx", "edx");
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#else
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__asm__("cpuid"
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: "=a" (val) : "a" (op) : "ebx", "ecx", "edx");
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#endif
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unsigned int tmp, val;
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cpuid(op, &val, &tmp, &tmp, &tmp);
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return val;
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}
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@ -910,14 +900,7 @@ static inline unsigned int cpuid_ebx(unsigned int op)
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/*@*/
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{
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unsigned int tmp, val;
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#ifdef PIC
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__asm__("pushl %%ebx; cpuid; movl %%ebx,%1; popl %%ebx"
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: "=a" (tmp), "=g" (val) : "a" (op) : "ecx", "edx");
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#else
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__asm__("cpuid"
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: "=a" (tmp), "=b" (val) : "a" (op) : "ecx", "edx");
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#endif
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cpuid(op, &tmp, &val, &tmp, &tmp);
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return val;
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}
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@ -925,30 +908,16 @@ static inline unsigned int cpuid_ecx(unsigned int op)
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/*@*/
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{
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unsigned int tmp, val;
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#ifdef PIC
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__asm__("pushl %%ebx; cpuid; popl %%ebx"
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: "=a" (tmp), "=c" (val) : "a" (op) : "edx");
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#else
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__asm__("cpuid"
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: "=a" (tmp), "=c" (val) : "a" (op) : "ebx", "edx");
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#endif
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cpuid(op, &tmp, &tmp, &val, &tmp);
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return val;
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}
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static inline unsigned int cpuid_edx(unsigned int op)
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/*@*/
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{
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unsigned int tmp, val;
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#ifdef PIC
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__asm__("pushl %%ebx; cpuid; popl %%ebx"
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: "=a" (tmp), "=d" (val) : "a" (op) : "ecx");
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#else
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__asm__("cpuid"
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: "=a" (tmp), "=d" (val) : "a" (op) : "ebx", "ecx");
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#endif
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cpuid(op, &tmp, &tmp, &tmp, &val);
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return val;
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}
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/*@unchecked@*/
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@ -970,10 +939,10 @@ static inline int RPMClass(void)
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signal(SIGILL, model3);
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if(sigsetjmp(jenv, 1))
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if (sigsetjmp(jenv, 1))
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return 3;
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if(cpuid_eax(0x000000000)==0)
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if (cpuid_eax(0x000000000)==0)
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return 4;
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cpuid(0x00000001, &tfms, &junk, &junk, &cap);
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@ -981,7 +950,7 @@ static inline int RPMClass(void)
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cpu = (tfms>>8)&15;
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if(cpu < 6)
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if (cpu < 6)
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return cpu;
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if (cap & (1<<15)) {
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@ -994,7 +963,6 @@ static inline int RPMClass(void)
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return 5;
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}
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#if 0
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/* should only be called for model 6 CPU's */
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static int is_athlon(void)
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/*@*/
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@ -1021,7 +989,73 @@ static int is_athlon(void)
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return 1;
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}
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#endif
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static int is_pentium3(void)
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{
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unsigned int eax, ebx, ecx, edx, family, model;
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char vendor[16];
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cpuid(0, &eax, &ebx, &ecx, &edx);
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memset(vendor, 0, sizeof(vendor));
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*((unsigned int *)&vendor[0]) = ebx;
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*((unsigned int *)&vendor[4]) = edx;
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*((unsigned int *)&vendor[8]) = ecx;
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if (strncmp(vendor, "GenuineIntel", 12) != 0)
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return 0;
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cpuid(1, &eax, &ebx, &ecx, &edx);
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family = (eax >> 8) & 0x0f;
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model = (eax >> 4) & 0x0f;
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if (family == 6)
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switch (model)
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{
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case 7: // Pentium III, Pentium III Xeon (model 7)
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case 8: // Pentium III, Pentium III Xeon, Celeron (model 8)
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case 9: // Pentium M
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/*
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Intel recently announced its new technology for mobile platforms,
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named Centrino, and presents it as a big advance in mobile PCs.
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One of the main part of Centrino consists in a brand new CPU,
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the Pentium M, codenamed Banias, that we'll study in this review.
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A particularity of this CPU is that it was designed for mobile platform
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exclusively, unlike previous mobile CPU (Pentium III-M, Pentium 4-M)
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that share the same micro-architecture as their desktop counterparts.
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The Pentium M introduces a new micro-architecture, adapted for mobility
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constraints, and that is halfway between the Pentium III and the Pentium 4.
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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*/
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case 10: // Pentium III Xeon (model A)
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case 11: // Pentium III (model B)
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return 1;
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}
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return 0;
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}
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static int is_pentium4(void)
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{
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unsigned int eax, ebx, ecx, edx, family, model;
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char vendor[16];
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cpuid(0, &eax, &ebx, &ecx, &edx);
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memset(vendor, 0, sizeof(vendor));
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*((unsigned int *)&vendor[0]) = ebx;
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*((unsigned int *)&vendor[4]) = edx;
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*((unsigned int *)&vendor[8]) = ecx;
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if (strncmp(vendor, "GenuineIntel", 12) != 0)
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return 0;
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cpuid(1, &eax, &ebx, &ecx, &edx);
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family = (eax >> 8) & 0x0f;
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model = (eax >> 4) & 0x0f;
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if (family == 15)
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switch (model)
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{
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case 0: // Pentium 4, Pentium 4 Xeon (0.18um)
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case 1: // Pentium 4, Pentium 4 Xeon MP, Celeron (0.18um)
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case 2: // Pentium 4, Mobile Pentium 4-M,
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// Pentium 4 Xeon, Pentium 4 Xeon MP,
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// Celeron, Mobile Celron (0.13um)
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case 3: // Pentium 4, Celeron (0.09um)
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return 1;
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}
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return 0;
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}
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#endif
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@ -1034,39 +1068,6 @@ static void mfspr_ill(int notused)
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}
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#endif
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static const char *
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checkCPU (void)
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{
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int fd = open ("/proc/cpuinfo", O_RDONLY);
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if (fd >= 0)
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{
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char buffer[BUFSIZ];
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memset (buffer, 0, sizeof buffer);
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read (fd, buffer, sizeof buffer - 1);
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close (fd);
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if (strstr (buffer, "AMD"))
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{
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if (strstr (buffer, "Athlon")
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|| strstr (buffer, "Duron"))
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return "athlon";
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if (strstr (buffer, "K6"))
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return "k6";
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} else if (strstr (buffer, "Intel"))
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{
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if (strstr (buffer, "Pentium(R) 4")
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|| strstr (buffer, "Intel(R) Xeon(TM)")
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|| strstr (buffer, "Intel(R) XEON(TM)"))
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return "pentium4";
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}
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}
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return 0;
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}
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/**
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*/
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static void defaultMachine(/*@out@*/ const char ** arch,
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@ -1113,6 +1114,13 @@ static void defaultMachine(/*@out@*/ const char ** arch,
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strcpy(un.machine, __power_pc() ? "ppc" : "rs6000");
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sprintf(un.sysname,"aix%s.%s", un.version, un.release);
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}
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else if(!strcmp(un.sysname, "Darwin")) {
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#ifdef __ppc__
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strcpy(un.machine, "ppc");
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#else ifdef __i386__
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strcpy(un.machine, "i386");
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#endif
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}
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else if (!strcmp(un.sysname, "SunOS")) {
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if (!strncmp(un.release,"4", 1)) /* SunOS 4.x */ {
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int fd;
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@ -1287,25 +1295,18 @@ static void defaultMachine(/*@out@*/ const char ** arch,
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# endif
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# if defined(__linux__) && defined(__i386__)
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#if 0
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{
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char class = (char) (RPMClass() | '0');
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if ((class == '6' && is_athlon()) || class == '7')
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strcpy(un.machine, "athlon");
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else if (is_pentium4())
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strcpy(un.machine, "pentium4");
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else if (is_pentium3())
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strcpy(un.machine, "pentium3");
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else if (strchr("3456", un.machine[1]) && un.machine[1] != class)
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un.machine[1] = class;
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}
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#endif
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if (!strcmp (un.machine, "i586") || !strcmp (un.machine, "i686"))
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{
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const char *c = checkCPU ();
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if (c)
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strcpy (un.machine, c);
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}
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# endif
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# if defined(__linux__) && defined(__powerpc__)
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@ -1319,12 +1320,25 @@ static void defaultMachine(/*@out@*/ const char ** arch,
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if ( pvr ) {
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pvr >>= 16;
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if ( pvr >= 0x40)
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strcpy(un.machine, "ppcpseries");
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else if ( (pvr == 0x36) || (pvr == 0x37) )
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switch (pvr) {
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/* IBM750FX, 7410, 7450, 7451, 7441, 7455, 7445 */
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case 0x7000:
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case 0x8000:
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case 0x8001:
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case 0x800c:
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strcpy(un.machine, "ppc");
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break;
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case 0x36:
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case 0x37:
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strcpy(un.machine, "ppciseries");
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else
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strcpy(un.machine, "ppc");
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break;
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default:
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if ( pvr >= 0x40)
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strcpy(un.machine, "ppcpseries");
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else
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strcpy(un.machine, "ppc");
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break;
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}
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}
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}
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# endif
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