tests, ovs: add updelay and downdelay ovs-bond options test

Add missing integration tests for OVS Link Aggregation support. We
support downdelay and updelay so they need to be tested properly.

Signed-off-by: Fernando Fernandez Mancera <ffmancera@riseup.net>
This commit is contained in:
Fernando Fernandez Mancera 2022-11-24 10:48:42 +01:00 committed by Fernando Fernández Mancera
parent b66383095e
commit 7ddd51853d
2 changed files with 66 additions and 2 deletions

View File

@ -311,6 +311,60 @@ class TestOvsLinkAggregation:
libnmstate.apply(bridge.state)
assertlib.assert_state_match(bridge.state)
@pytest.mark.tier1
def test_add_ovs_lag_with_updelay_and_downdelay(self, port0_up, port1_up):
port0_name = port0_up[Interface.KEY][0][Interface.NAME]
port1_name = port1_up[Interface.KEY][0][Interface.NAME]
bridge = Bridge(BRIDGE1)
bridge.add_link_aggregation_port(
BOND1,
(port0_name, port1_name),
mode="active-backup",
updelay=1000,
downdelay=1000,
)
with bridge.create() as state:
assertlib.assert_state_match(state)
assertlib.assert_absent(BRIDGE1)
assertlib.assert_absent(BOND1)
@pytest.mark.tier1
def test_modify_ovs_lag_with_updelay_and_downdelay(
self, port0_up, port1_up
):
port0_name = port0_up[Interface.KEY][0][Interface.NAME]
port1_name = port1_up[Interface.KEY][0][Interface.NAME]
bridge = Bridge(BRIDGE1)
bridge.add_link_aggregation_port(
BOND1,
(port0_name, port1_name),
mode="active-backup",
updelay=1000,
downdelay=1000,
)
with bridge.create() as state:
assertlib.assert_state_match(state)
state[Interface.KEY][0][OVSBridge.CONFIG_SUBTREE][
OVSBridge.PORT_SUBTREE
][0][OVSBridge.Port.LINK_AGGREGATION_SUBTREE][
OVSBridge.Port.LinkAggregation.Options.DOWN_DELAY
] = 100
state[Interface.KEY][0][OVSBridge.CONFIG_SUBTREE][
OVSBridge.PORT_SUBTREE
][0][OVSBridge.Port.LINK_AGGREGATION_SUBTREE][
OVSBridge.Port.LinkAggregation.Options.UP_DELAY
] = 100
libnmstate.apply(state)
assertlib.assert_state_match(state)
assertlib.assert_absent(BRIDGE1)
assertlib.assert_absent(BOND1)
@pytest.mark.tier1
def test_ovs_vlan_access_tag():

View File

@ -51,7 +51,9 @@ class Bridge:
def add_system_port(self, name):
self._add_port(name)
def add_link_aggregation_port(self, name, port, mode=None):
def add_link_aggregation_port(
self, name, port, mode=None, updelay=None, downdelay=None
):
self._add_port(name)
port_cfg = self._get_port(name)
port_cfg[OVSBridge.Port.LINK_AGGREGATION_SUBTREE] = {
@ -61,9 +63,17 @@ class Bridge:
]
}
if mode:
port[OVSBridge.Port.LINK_AGGREGATION_SUBTREE][
port_cfg[OVSBridge.Port.LINK_AGGREGATION_SUBTREE][
OVSBridge.Port.LinkAggregation.MODE
] = mode
if updelay is not None:
port_cfg[OVSBridge.Port.LINK_AGGREGATION_SUBTREE][
OVSBridge.Port.LinkAggregation.Options.UP_DELAY
] = updelay
if downdelay is not None:
port_cfg[OVSBridge.Port.LINK_AGGREGATION_SUBTREE][
OVSBridge.Port.LinkAggregation.Options.DOWN_DELAY
] = downdelay
def add_internal_port(
self,