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linux/arch/sparc/kernel/trampoline_32.S

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sparc: remove CVS keywords This patch removes the CVS keywords that weren't updated for a long time from comments. Signed-off-by: Adrian Bunk <bunk@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2008-05-20 03:53:02 +04:00
/*
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
* trampoline.S: SMP cpu boot-up trampoline code.
*
* Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
* Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
*/
#include <linux/init.h>
#include <asm/head.h>
#include <asm/psr.h>
#include <asm/page.h>
#include <asm/asi.h>
#include <asm/ptrace.h>
#include <asm/vaddrs.h>
#include <asm/contregs.h>
#include <asm/thread_info.h>
sparc32: Implement hard_smp_processor_id() via instruction patching. This is the last non-trivial user of btfixup. Like sparc64, use a special patch section to resolve the various implementations of how to read the current CPU's ID when we don't have current_thread_info()->cpu necessarily available. Signed-off-by: David S. Miller <davem@davemloft.net> Tested-by: Sam Ravnborg <sam@ravnborg.org>
2012-05-14 10:09:04 +04:00
.globl sun4m_cpu_startup
.globl sun4d_cpu_startup
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
sparc32 cpuinit flase positives All noise since we don't have CPU hotplug there. However, they did expose something very odd-looking in there - poke_viking() does a bunch of identical btfixup each time it's called (i.e. for each CPU). That one is left alone for now; just the trivial misannotation fixes. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2008-11-22 20:33:54 +03:00
__CPUINIT
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
.align 4
/* When we start up a cpu for the first time it enters this routine.
* This initializes the chip from whatever state the prom left it
* in and sets PIL in %psr to 15, no irqs.
*/
sun4m_cpu_startup:
cpu1_startup:
sethi %hi(trapbase_cpu1), %g3
b 1f
or %g3, %lo(trapbase_cpu1), %g3
cpu2_startup:
sethi %hi(trapbase_cpu2), %g3
b 1f
or %g3, %lo(trapbase_cpu2), %g3
cpu3_startup:
sethi %hi(trapbase_cpu3), %g3
b 1f
or %g3, %lo(trapbase_cpu3), %g3
1:
/* Set up a sane %psr -- PIL<0xf> S<0x1> PS<0x1> CWP<0x0> */
set (PSR_PIL | PSR_S | PSR_PS), %g1
wr %g1, 0x0, %psr ! traps off though
WRITE_PAUSE
/* Our %wim is one behind CWP */
mov 2, %g1
wr %g1, 0x0, %wim
WRITE_PAUSE
/* This identifies "this cpu". */
wr %g3, 0x0, %tbr
WRITE_PAUSE
/* Give ourselves a stack and curptr. */
set current_set, %g5
srl %g3, 10, %g4
and %g4, 0xc, %g4
ld [%g5 + %g4], %g6
sethi %hi(THREAD_SIZE - STACKFRAME_SZ), %sp
or %sp, %lo(THREAD_SIZE - STACKFRAME_SZ), %sp
add %g6, %sp, %sp
/* Turn on traps (PSR_ET). */
rd %psr, %g1
wr %g1, PSR_ET, %psr ! traps on
WRITE_PAUSE
/* Init our caches, etc. */
set poke_srmmu, %g5
ld [%g5], %g5
call %g5
nop
/* Start this processor. */
call smp4m_callin
nop
b,a smp_do_cpu_idle
.text
.align 4
smp_do_cpu_idle:
call cpu_idle
mov 0, %o0
call cpu_panic
nop
/* CPUID in bootbus can be found at PA 0xff0140000 */
#define SUN4D_BOOTBUS_CPUID 0xf0140000
sparc32 cpuinit flase positives All noise since we don't have CPU hotplug there. However, they did expose something very odd-looking in there - poke_viking() does a bunch of identical btfixup each time it's called (i.e. for each CPU). That one is left alone for now; just the trivial misannotation fixes. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2008-11-22 20:33:54 +03:00
__CPUINIT
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
.align 4
sun4d_cpu_startup:
/* Set up a sane %psr -- PIL<0xf> S<0x1> PS<0x1> CWP<0x0> */
set (PSR_PIL | PSR_S | PSR_PS), %g1
wr %g1, 0x0, %psr ! traps off though
WRITE_PAUSE
/* Our %wim is one behind CWP */
mov 2, %g1
wr %g1, 0x0, %wim
WRITE_PAUSE
/* Set tbr - we use just one trap table. */
set trapbase, %g1
wr %g1, 0x0, %tbr
WRITE_PAUSE
/* Get our CPU id out of bootbus */
set SUN4D_BOOTBUS_CPUID, %g3
lduba [%g3] ASI_M_CTL, %g3
and %g3, 0xf8, %g3
srl %g3, 3, %g1
sta %g1, [%g0] ASI_M_VIKING_TMP1
/* Give ourselves a stack and curptr. */
set current_set, %g5
srl %g3, 1, %g4
ld [%g5 + %g4], %g6
sethi %hi(THREAD_SIZE - STACKFRAME_SZ), %sp
or %sp, %lo(THREAD_SIZE - STACKFRAME_SZ), %sp
add %g6, %sp, %sp
/* Turn on traps (PSR_ET). */
rd %psr, %g1
wr %g1, PSR_ET, %psr ! traps on
WRITE_PAUSE
/* Init our caches, etc. */
set poke_srmmu, %g5
ld [%g5], %g5
call %g5
nop
/* Start this processor. */
call smp4d_callin
nop
b,a smp_do_cpu_idle
sparc,leon: Sparc-Leon SMP support Support SMP for a Sparc-Leon multiprocessor system. Add Leon specific SMP code to arch/sparc/kernel/leon_smp.c. Signed-off-by: Konrad Eisele <konrad@gaisler.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-09-01 02:08:13 +04:00
__CPUINIT
.align 4
.global leon_smp_cpu_startup, smp_penguin_ctable
leon_smp_cpu_startup:
set smp_penguin_ctable,%g1
ld [%g1+4],%g1
srl %g1,4,%g1
set 0x00000100,%g5 /* SRMMU_CTXTBL_PTR */
sparc32,leon: always include leon_smp + leon_mm in build Fix-up leon specific assembler to use ASI_LEON_MMUREGS Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Cc: Daniel Hellstrom <daniel@gaisler.com> Cc: Konrad Eisele <konrad@gaisler.com>
2012-05-26 01:20:14 +04:00
sta %g1, [%g5] ASI_LEON_MMUREGS
sparc,leon: Sparc-Leon SMP support Support SMP for a Sparc-Leon multiprocessor system. Add Leon specific SMP code to arch/sparc/kernel/leon_smp.c. Signed-off-by: Konrad Eisele <konrad@gaisler.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-09-01 02:08:13 +04:00
/* Set up a sane %psr -- PIL<0xf> S<0x1> PS<0x1> CWP<0x0> */
set (PSR_PIL | PSR_S | PSR_PS), %g1
wr %g1, 0x0, %psr ! traps off though
WRITE_PAUSE
/* Our %wim is one behind CWP */
mov 2, %g1
wr %g1, 0x0, %wim
WRITE_PAUSE
/* Set tbr - we use just one trap table. */
set trapbase, %g1
wr %g1, 0x0, %tbr
WRITE_PAUSE
/* Get our CPU id */
rd %asr17,%g3
/* Give ourselves a stack and curptr. */
set current_set, %g5
srl %g3, 28, %g4
sll %g4, 2, %g4
ld [%g5 + %g4], %g6
sethi %hi(THREAD_SIZE - STACKFRAME_SZ), %sp
or %sp, %lo(THREAD_SIZE - STACKFRAME_SZ), %sp
add %g6, %sp, %sp
/* Turn on traps (PSR_ET). */
rd %psr, %g1
wr %g1, PSR_ET, %psr ! traps on
WRITE_PAUSE
/* Init our caches, etc. */
set poke_srmmu, %g5
ld [%g5], %g5
call %g5
nop
/* Start this processor. */
call leon_callin
nop
b,a smp_do_cpu_idle
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